min_fclk_required_by_uclk 3180 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		int min_fclk_required_by_uclk;
min_fclk_required_by_uclk 3185 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		min_fclk_required_by_uclk = mul_u64_u32_shr(BIT_ULL(32) * 1080 / 1000000, uclk_states[i], 32);
min_fclk_required_by_uclk 3187 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		calculated_states[i].fabricclk_mhz = (min_fclk_required_by_uclk < min_dcfclk) ?
min_fclk_required_by_uclk 3188 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 				min_dcfclk : min_fclk_required_by_uclk;