mii_control       275 drivers/net/ethernet/amd/au1000_eth.c 	u32 *const mii_control_reg = &aup->mac->mii_control;
mii_control       278 drivers/net/ethernet/amd/au1000_eth.c 	u32 mii_control;
mii_control       288 drivers/net/ethernet/amd/au1000_eth.c 	mii_control = MAC_SET_MII_SELECT_REG(reg) |
mii_control       291 drivers/net/ethernet/amd/au1000_eth.c 	writel(mii_control, mii_control_reg);
mii_control       308 drivers/net/ethernet/amd/au1000_eth.c 	u32 *const mii_control_reg = &aup->mac->mii_control;
mii_control       311 drivers/net/ethernet/amd/au1000_eth.c 	u32 mii_control;
mii_control       321 drivers/net/ethernet/amd/au1000_eth.c 	mii_control = MAC_SET_MII_SELECT_REG(reg) |
mii_control       325 drivers/net/ethernet/amd/au1000_eth.c 	writel(mii_control, mii_control_reg);
mii_control        62 drivers/net/ethernet/amd/au1000_eth.h 	u32 mii_control;
mii_control      4893 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 	u16 mii_control;
mii_control      4897 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 			  MDIO_COMBO_IEEE0_MII_CONTROL, &mii_control);
mii_control      4903 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 			  (mii_control |
mii_control      4916 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 				  &mii_control);
mii_control      4918 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 		if (!(mii_control & MDIO_COMBO_IEEO_MII_CONTROL_RESET)) {
mii_control      5226 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 	u16 mii_control;
mii_control      5235 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 				  &mii_control);
mii_control      5240 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 				  (mii_control |
mii_control      5248 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 				  &mii_control);
mii_control      5251 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 			 mii_control);
mii_control      5255 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 				  (mii_control |
mii_control      5287 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 		u16 mii_control;
mii_control      5292 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 				  &mii_control);
mii_control      5293 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 		mii_control &= ~(MDIO_COMBO_IEEO_MII_CONTROL_AN_EN |
mii_control      5299 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 			mii_control |=
mii_control      5303 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 			mii_control |=
mii_control      5318 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 			mii_control |=
mii_control      5323 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c 				  mii_control);
mii_control      1392 drivers/net/ethernet/nvidia/forcedeth.c 	u32 mii_status, mii_control, mii_control_1000, reg;
mii_control      1462 drivers/net/ethernet/nvidia/forcedeth.c 	mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
mii_control      1463 drivers/net/ethernet/nvidia/forcedeth.c 	mii_control |= BMCR_ANENABLE;
mii_control      1469 drivers/net/ethernet/nvidia/forcedeth.c 		mii_control |= BMCR_ANRESTART;
mii_control      1470 drivers/net/ethernet/nvidia/forcedeth.c 		if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) {
mii_control      1479 drivers/net/ethernet/nvidia/forcedeth.c 		if (phy_reset(dev, mii_control)) {
mii_control      1522 drivers/net/ethernet/nvidia/forcedeth.c 	mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
mii_control      1523 drivers/net/ethernet/nvidia/forcedeth.c 	mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE);
mii_control      1525 drivers/net/ethernet/nvidia/forcedeth.c 		mii_control |= BMCR_PDOWN;
mii_control      1526 drivers/net/ethernet/nvidia/forcedeth.c 	if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control))
mii_control      6123 drivers/net/ethernet/nvidia/forcedeth.c 	u16 phy_reserved, mii_control;
mii_control      6136 drivers/net/ethernet/nvidia/forcedeth.c 		mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
mii_control      6137 drivers/net/ethernet/nvidia/forcedeth.c 		mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE);
mii_control      6138 drivers/net/ethernet/nvidia/forcedeth.c 		mii_rw(dev, np->phyaddr, MII_BMCR, mii_control);