MaskforPhySet     136 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 	u32 MaskforPhySet = 0;
MaskforPhySet     147 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord);
MaskforPhySet     149 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge));
MaskforPhySet     151 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord);
MaskforPhySet     153 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		PHY_SetBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge));
MaskforPhySet     156 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 	tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord);
MaskforPhySet     157 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 	PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEdge));
MaskforPhySet     158 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 	PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 | bLSSIReadEdge);
MaskforPhySet     167 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1|MaskforPhySet, BIT8);
MaskforPhySet     169 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1|MaskforPhySet, BIT8);
MaskforPhySet     173 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi|MaskforPhySet, bLSSIReadBackData);
MaskforPhySet     178 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack|MaskforPhySet, bLSSIReadBackData);