mfc_tclass_id_RW  620 arch/powerpc/include/asm/spu.h 	u64 mfc_tclass_id_RW;					/* 0x820 */
mfc_tclass_id_RW  162 arch/powerpc/include/asm/spu_csa.h 	u64 mfc_tclass_id_RW;
mfc_tclass_id_RW  113 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id);
mfc_tclass_id_RW  118 arch/powerpc/platforms/cell/spu_priv1_mmio.c 	return in_be64(&spu->priv1->mfc_tclass_id_RW);
mfc_tclass_id_RW  442 arch/powerpc/platforms/cell/spufs/switch.c 	csa->priv1.mfc_tclass_id_RW = spu_mfc_tclass_id_get(spu);
mfc_tclass_id_RW 1512 arch/powerpc/platforms/cell/spufs/switch.c 	spu_mfc_tclass_id_set(spu, csa->priv1.mfc_tclass_id_RW);
mfc_tclass_id_RW  558 arch/powerpc/platforms/ps3/spu.c 		offsetof(struct spu_priv1, mfc_tclass_id_RW),