meta_req_height   357 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	unsigned int meta_req_height;
meta_req_height   478 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	meta_req_height = 1 << log2_meta_req_height;
meta_req_height   491 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1)
meta_req_height   492 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 				+ meta_req_height;
meta_req_height   493 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_height;
meta_req_height   539 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height;
meta_req_height   357 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	unsigned int meta_req_height;
meta_req_height   478 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	meta_req_height = 1 << log2_meta_req_height;
meta_req_height   491 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1)
meta_req_height   492 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 				+ meta_req_height;
meta_req_height   493 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_height;
meta_req_height   539 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height;
meta_req_height   437 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 		unsigned int           meta_req_height[],
meta_req_height  1960 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 				&locals->meta_req_height[k],
meta_req_height  2523 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 		locals->meta_req_height,
meta_req_height  4537 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 						&locals->meta_req_height[k],
meta_req_height  5825 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 		unsigned int meta_req_height[],
meta_req_height  5902 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 						- meta_req_height[k];
meta_req_height   348 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	unsigned int meta_req_height;
meta_req_height   473 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	meta_req_height = 1 << log2_meta_req_height;
meta_req_height   486 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1)
meta_req_height   487 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 				+ meta_req_height;
meta_req_height   488 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_height;
meta_req_height   537 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height;
meta_req_height   582 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	unsigned int meta_req_height[DC__NUM_DPP__MAX];
meta_req_height   566 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	unsigned int meta_req_height;
meta_req_height   709 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	meta_req_height = 1 << log2_meta_req_height;
meta_req_height   723 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 		meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1)
meta_req_height   724 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 				+ meta_req_height;
meta_req_height   725 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 		rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_height;
meta_req_height   766 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 		meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height;