meta_chunks_per_row_ub_l  844 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	unsigned int meta_chunks_per_row_ub_l;
meta_chunks_per_row_ub_l  998 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	meta_chunks_per_row_ub_l = rq_dlg_param.rq_l.meta_chunks_per_row_ub;
meta_chunks_per_row_ub_l 1428 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 					* ref_freq_to_pix_freq / (double) meta_chunks_per_row_ub_l);
meta_chunks_per_row_ub_l 1437 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 			* ref_freq_to_pix_freq) / meta_chunks_per_row_ub_l;
meta_chunks_per_row_ub_l 1474 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 			/ (double) meta_chunks_per_row_ub_l);
meta_chunks_per_row_ub_l  844 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	unsigned int meta_chunks_per_row_ub_l;
meta_chunks_per_row_ub_l  998 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	meta_chunks_per_row_ub_l = rq_dlg_param.rq_l.meta_chunks_per_row_ub;
meta_chunks_per_row_ub_l 1428 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 					* ref_freq_to_pix_freq / (double) meta_chunks_per_row_ub_l);
meta_chunks_per_row_ub_l 1437 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 			* ref_freq_to_pix_freq) / meta_chunks_per_row_ub_l;
meta_chunks_per_row_ub_l 1474 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 			/ (double) meta_chunks_per_row_ub_l);
meta_chunks_per_row_ub_l  891 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	unsigned int meta_chunks_per_row_ub_l;
meta_chunks_per_row_ub_l 1038 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	meta_chunks_per_row_ub_l = rq_dlg_param.rq_l.meta_chunks_per_row_ub;
meta_chunks_per_row_ub_l 1506 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 					* ref_freq_to_pix_freq / (double) meta_chunks_per_row_ub_l);
meta_chunks_per_row_ub_l 1515 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 			* ref_freq_to_pix_freq) / meta_chunks_per_row_ub_l;
meta_chunks_per_row_ub_l 1574 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 			/ (double) meta_chunks_per_row_ub_l);
meta_chunks_per_row_ub_l 1042 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	unsigned int meta_chunks_per_row_ub_l;
meta_chunks_per_row_ub_l 1224 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	meta_chunks_per_row_ub_l = rq_dlg_param.rq_l.meta_chunks_per_row_ub;
meta_chunks_per_row_ub_l 1528 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 					* ref_freq_to_pix_freq / (double) meta_chunks_per_row_ub_l);
meta_chunks_per_row_ub_l 1573 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 			/ (double) meta_chunks_per_row_ub_l);