meta_chunks_per_row_ub  542 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 1;
meta_chunks_per_row_ub  544 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 2;
meta_chunks_per_row_ub  998 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	meta_chunks_per_row_ub_l = rq_dlg_param.rq_l.meta_chunks_per_row_ub;
meta_chunks_per_row_ub  999 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	meta_chunks_per_row_ub_c = rq_dlg_param.rq_c.meta_chunks_per_row_ub;
meta_chunks_per_row_ub  542 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 1;
meta_chunks_per_row_ub  544 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 2;
meta_chunks_per_row_ub  998 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	meta_chunks_per_row_ub_l = rq_dlg_param.rq_l.meta_chunks_per_row_ub;
meta_chunks_per_row_ub  999 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	meta_chunks_per_row_ub_c = rq_dlg_param.rq_c.meta_chunks_per_row_ub;
meta_chunks_per_row_ub 5862 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 	unsigned int meta_chunks_per_row_ub;
meta_chunks_per_row_ub 5905 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 				meta_chunks_per_row_ub = meta_chunk_per_row_int + 1;
meta_chunks_per_row_ub 5907 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 				meta_chunks_per_row_ub = meta_chunk_per_row_int + 2;
meta_chunks_per_row_ub 5910 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 					/ PixelClock[k] / meta_chunks_per_row_ub;
meta_chunks_per_row_ub 5912 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 					* HTotal[k] / PixelClock[k] / meta_chunks_per_row_ub;
meta_chunks_per_row_ub 5914 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 					* HTotal[k] / PixelClock[k] / meta_chunks_per_row_ub;
meta_chunks_per_row_ub  540 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 1;
meta_chunks_per_row_ub  542 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 2;
meta_chunks_per_row_ub 1038 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	meta_chunks_per_row_ub_l = rq_dlg_param.rq_l.meta_chunks_per_row_ub;
meta_chunks_per_row_ub 1039 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	meta_chunks_per_row_ub_c = rq_dlg_param.rq_c.meta_chunks_per_row_ub;
meta_chunks_per_row_ub  379 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h 	unsigned int meta_chunks_per_row_ub;
meta_chunks_per_row_ub   95 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 			rq_dlg_param.meta_chunks_per_row_ub);
meta_chunks_per_row_ub  769 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 		rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 1;
meta_chunks_per_row_ub  771 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 		rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 2;
meta_chunks_per_row_ub 1224 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	meta_chunks_per_row_ub_l = rq_dlg_param.rq_l.meta_chunks_per_row_ub;