meta_chunk_width 367 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c unsigned int meta_chunk_width; meta_chunk_width 509 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c meta_chunk_width = 1 << log2_meta_chunk_width; meta_chunk_width 510 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c meta_chunk_per_row_int = (unsigned int) (meta_row_width_ub / meta_chunk_width); meta_chunk_width 511 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c meta_row_remainder = meta_row_width_ub % meta_chunk_width; meta_chunk_width 367 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c unsigned int meta_chunk_width; meta_chunk_width 509 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c meta_chunk_width = 1 << log2_meta_chunk_width; meta_chunk_width 510 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c meta_chunk_per_row_int = (unsigned int) (meta_row_width_ub / meta_chunk_width); meta_chunk_width 511 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c meta_row_remainder = meta_row_width_ub % meta_chunk_width; meta_chunk_width 5857 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c unsigned int meta_chunk_width; meta_chunk_width 5892 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c meta_chunk_width = MetaChunkSize * 1024 * 256 meta_chunk_width 5896 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c meta_chunk_per_row_int = meta_row_width[k] / meta_chunk_width; meta_chunk_width 5897 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c meta_row_remainder = meta_row_width[k] % meta_chunk_width; meta_chunk_width 358 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c unsigned int meta_chunk_width; meta_chunk_width 504 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c meta_chunk_width = 1 << log2_meta_chunk_width; meta_chunk_width 505 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c meta_chunk_per_row_int = (unsigned int) (meta_row_width_ub / meta_chunk_width); meta_chunk_width 506 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c meta_row_remainder = meta_row_width_ub % meta_chunk_width; meta_chunk_width 574 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c unsigned int meta_chunk_width; meta_chunk_width 739 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c meta_chunk_width = 1 << log2_meta_chunk_width; meta_chunk_width 740 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c meta_chunk_per_row_int = (unsigned int) (meta_row_width_ub / meta_chunk_width); meta_chunk_width 741 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c meta_row_remainder = meta_row_width_ub % meta_chunk_width;