meta_chunk_size 790 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->extra_latency = v->urgent_round_trip_and_out_of_order_latency_per_state[i] + (v->total_number_of_active_dpp[i][j] * v->pixel_chunk_size_in_kbyte + v->total_number_of_dcc_active_dpp[i][j] * v->meta_chunk_size) * 1024.0 / v->return_bw_per_state[i]; meta_chunk_size 1318 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->urgent_extra_latency = v->urgent_round_trip_and_out_of_order_latency + (v->total_active_dpp * v->pixel_chunk_size_in_kbyte + v->total_dcc_active_dpp * v->meta_chunk_size) * 1024.0 / v->return_bw; meta_chunk_size 136 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c .meta_chunk_size = 2, /*kbytes*/ meta_chunk_size 796 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->meta_chunk_size = dc->dcn_ip->meta_chunk_size; meta_chunk_size 1676 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->meta_chunk_size, meta_chunk_size 1728 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.meta_chunk_size_kbytes = dc->dcn_ip->meta_chunk_size; meta_chunk_size 558 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c META_CHUNK_SIZE, rq_regs->rq_regs_l.meta_chunk_size, meta_chunk_size 567 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c META_CHUNK_SIZE_C, rq_regs->rq_regs_c.meta_chunk_size, meta_chunk_size 1029 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c META_CHUNK_SIZE, &rq_regs->rq_regs_l.meta_chunk_size, meta_chunk_size 1039 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c META_CHUNK_SIZE_C, &rq_regs->rq_regs_c.meta_chunk_size, meta_chunk_size 175 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c rq_regs->rq_regs_l.min_chunk_size, rq_regs->rq_regs_l.meta_chunk_size, meta_chunk_size 179 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c rq_regs->rq_regs_c.meta_chunk_size, rq_regs->rq_regs_c.min_meta_chunk_size, meta_chunk_size 214 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c rq_regs->rq_regs_l.min_chunk_size, rq_regs->rq_regs_l.meta_chunk_size, meta_chunk_size 218 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c rq_regs->rq_regs_c.meta_chunk_size, rq_regs->rq_regs_c.min_meta_chunk_size, meta_chunk_size 206 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c META_CHUNK_SIZE, rq_regs->rq_regs_l.meta_chunk_size, meta_chunk_size 215 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c META_CHUNK_SIZE_C, rq_regs->rq_regs_c.meta_chunk_size, meta_chunk_size 1227 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c META_CHUNK_SIZE, &rq_regs->rq_regs_l.meta_chunk_size, meta_chunk_size 1237 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c META_CHUNK_SIZE_C, &rq_regs->rq_regs_c.meta_chunk_size, meta_chunk_size 132 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c META_CHUNK_SIZE, rq_regs->rq_regs_l.meta_chunk_size, meta_chunk_size 141 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c META_CHUNK_SIZE_C, rq_regs->rq_regs_c.meta_chunk_size, meta_chunk_size 179 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c rq_regs->meta_chunk_size = dml_log2(rq_sizing.meta_chunk_bytes) - 10; meta_chunk_size 179 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c rq_regs->meta_chunk_size = dml_log2(rq_sizing.meta_chunk_bytes) - 10; meta_chunk_size 157 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c rq_regs->meta_chunk_size = dml_log2(rq_sizing.meta_chunk_bytes) - 10; meta_chunk_size 486 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h unsigned int meta_chunk_size; meta_chunk_size 165 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c dml_print("DML_RQ_DLG_CALC: meta_chunk_size = 0x%0x\n", rq_regs.meta_chunk_size); meta_chunk_size 221 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c rq_regs->meta_chunk_size = dml_log2(rq_sizing.meta_chunk_bytes) - 10; meta_chunk_size 143 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h float meta_chunk_size; meta_chunk_size 592 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h int meta_chunk_size; /*kbytes*/