meta_chunk_per_row_int 368 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c unsigned int meta_chunk_per_row_int; meta_chunk_per_row_int 510 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c meta_chunk_per_row_int = (unsigned int) (meta_row_width_ub / meta_chunk_width); meta_chunk_per_row_int 542 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 1; meta_chunk_per_row_int 544 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 2; meta_chunk_per_row_int 368 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c unsigned int meta_chunk_per_row_int; meta_chunk_per_row_int 510 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c meta_chunk_per_row_int = (unsigned int) (meta_row_width_ub / meta_chunk_width); meta_chunk_per_row_int 542 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 1; meta_chunk_per_row_int 544 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 2; meta_chunk_per_row_int 5859 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c unsigned int meta_chunk_per_row_int; meta_chunk_per_row_int 5896 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c meta_chunk_per_row_int = meta_row_width[k] / meta_chunk_width; meta_chunk_per_row_int 5905 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c meta_chunks_per_row_ub = meta_chunk_per_row_int + 1; meta_chunk_per_row_int 5907 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c meta_chunks_per_row_ub = meta_chunk_per_row_int + 2; meta_chunk_per_row_int 359 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c unsigned int meta_chunk_per_row_int; meta_chunk_per_row_int 505 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c meta_chunk_per_row_int = (unsigned int) (meta_row_width_ub / meta_chunk_width); meta_chunk_per_row_int 540 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 1; meta_chunk_per_row_int 542 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 2; meta_chunk_per_row_int 575 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c unsigned int meta_chunk_per_row_int; meta_chunk_per_row_int 740 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c meta_chunk_per_row_int = (unsigned int) (meta_row_width_ub / meta_chunk_width); meta_chunk_per_row_int 769 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 1; meta_chunk_per_row_int 771 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 2;