meta_addr        2756 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	address->grph.meta_addr.low_part = lower_32_bits(dcc_address);
meta_addr        2757 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	address->grph.meta_addr.high_part = upper_32_bits(dcc_address);
meta_addr          85 drivers/gpu/drm/amd/display/dc/core/dc_debug.c 				plane_state->address.grph.meta_addr.quad_part,
meta_addr         197 drivers/gpu/drm/amd/display/dc/core/dc_debug.c 					update->flip_addr->address.grph.meta_addr.quad_part,
meta_addr          73 drivers/gpu/drm/amd/display/dc/dc_hw_types.h 			PHYSICAL_ADDRESS_LOC meta_addr;
meta_addr         385 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 		if (address->grph.meta_addr.quad_part != 0) {
meta_addr         388 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 					address->grph.meta_addr.high_part);
meta_addr         392 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 					address->grph.meta_addr.low_part);
meta_addr         725 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 		if (address->grph.meta_addr.quad_part != 0) {
meta_addr         728 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 					address->grph.meta_addr.high_part);
meta_addr         732 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 					address->grph.meta_addr.low_part);