memx                8 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramfuc.h 	struct nvkm_memx *memx;
memx               61 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramfuc.h 	int ret = nvkm_memx_init(fb->subdev.device->pmu, &ram->memx);
memx               75 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramfuc.h 		ret = nvkm_memx_fini(&ram->memx, exec);
memx              100 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramfuc.h 			nvkm_memx_wr32(ram->memx, reg->addr+off, reg->data);
memx              125 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramfuc.h 	nvkm_memx_wait(ram->memx, addr, mask, data, nsec);
memx              131 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramfuc.h 	nvkm_memx_nsec(ram->memx, nsec);
memx              137 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramfuc.h 	nvkm_memx_wait_vblank(ram->memx);
memx              143 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramfuc.h 	nvkm_memx_train(ram->memx);
memx              155 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramfuc.h 	nvkm_memx_block(ram->memx);
memx              161 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramfuc.h 	nvkm_memx_unblock(ram->memx);
memx              244 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c 			nvkm_memx_wr32(fuc->memx, addr, next);
memx               18 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c memx_out(struct nvkm_memx *memx)
memx               20 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	struct nvkm_device *device = memx->pmu->subdev.device;
memx               23 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	if (memx->c.mthd) {
memx               24 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 		nvkm_wr32(device, 0x10a1c4, (memx->c.size << 16) | memx->c.mthd);
memx               25 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 		for (i = 0; i < memx->c.size; i++)
memx               26 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 			nvkm_wr32(device, 0x10a1c4, memx->c.data[i]);
memx               27 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 		memx->c.mthd = 0;
memx               28 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 		memx->c.size = 0;
memx               33 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c memx_cmd(struct nvkm_memx *memx, u32 mthd, u32 size, u32 data[])
memx               35 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	if ((memx->c.size + size >= ARRAY_SIZE(memx->c.data)) ||
memx               36 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	    (memx->c.mthd && memx->c.mthd != mthd))
memx               37 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 		memx_out(memx);
memx               38 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memcpy(&memx->c.data[memx->c.size], data, size * sizeof(data[0]));
memx               39 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memx->c.size += size;
memx               40 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memx->c.mthd  = mthd;
memx               47 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	struct nvkm_memx *memx;
memx               56 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memx = *pmemx = kzalloc(sizeof(*memx), GFP_KERNEL);
memx               57 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	if (!memx)
memx               59 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memx->pmu = pmu;
memx               60 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memx->base = reply[0];
memx               61 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memx->size = reply[1];
memx               67 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	nvkm_wr32(device, 0x10a1c0, 0x01000000 | memx->base);
memx               74 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	struct nvkm_memx *memx = *pmemx;
memx               75 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	struct nvkm_pmu *pmu = memx->pmu;
memx               81 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memx_out(memx);
memx               90 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 			      memx->base, finish);
memx               95 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	kfree(memx);
memx              100 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c nvkm_memx_wr32(struct nvkm_memx *memx, u32 addr, u32 data)
memx              102 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	nvkm_debug(&memx->pmu->subdev, "R[%06x] = %08x\n", addr, data);
memx              103 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memx_cmd(memx, MEMX_WR32, 2, (u32[]){ addr, data });
memx              107 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c nvkm_memx_wait(struct nvkm_memx *memx,
memx              110 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	nvkm_debug(&memx->pmu->subdev, "R[%06x] & %08x == %08x, %d us\n",
memx              112 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memx_cmd(memx, MEMX_WAIT, 4, (u32[]){ addr, mask, data, nsec });
memx              113 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memx_out(memx); /* fuc can't handle multiple */
memx              117 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c nvkm_memx_nsec(struct nvkm_memx *memx, u32 nsec)
memx              119 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	nvkm_debug(&memx->pmu->subdev, "    DELAY = %d ns\n", nsec);
memx              120 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memx_cmd(memx, MEMX_DELAY, 1, (u32[]){ nsec });
memx              121 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memx_out(memx); /* fuc can't handle multiple */
memx              125 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c nvkm_memx_wait_vblank(struct nvkm_memx *memx)
memx              127 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	struct nvkm_subdev *subdev = &memx->pmu->subdev;
memx              154 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memx_cmd(memx, MEMX_VBLANK, 1, (u32[]){ head_sync });
memx              155 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memx_out(memx); /* fuc can't handle multiple */
memx              159 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c nvkm_memx_train(struct nvkm_memx *memx)
memx              161 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	nvkm_debug(&memx->pmu->subdev, "   MEM TRAIN\n");
memx              162 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memx_cmd(memx, MEMX_TRAIN, 0, NULL);
memx              192 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c nvkm_memx_block(struct nvkm_memx *memx)
memx              194 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	nvkm_debug(&memx->pmu->subdev, "   HOST BLOCKED\n");
memx              195 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memx_cmd(memx, MEMX_ENTER, 0, NULL);
memx              199 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c nvkm_memx_unblock(struct nvkm_memx *memx)
memx              201 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	nvkm_debug(&memx->pmu->subdev, "   HOST UNBLOCKED\n");
memx              202 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c 	memx_cmd(memx, MEMX_LEAVE, 0, NULL);