mem_intr           30 arch/mips/dec/kn02xa-berr.c 	volatile u32 *mem_intr = (void *)CKSEG1ADDR(KN02XA_MEM_INTR);
mem_intr           33 arch/mips/dec/kn02xa-berr.c 	*mem_intr = 0;			/* Any write clears the bus IRQ. */