mdsi              728 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 			   struct mipi_dsi_device *mdsi)
mdsi              732 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	if (mdsi->lanes < 1 || mdsi->lanes > 4) {
mdsi              737 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	dsi->lanes = mdsi->lanes;
mdsi              738 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	dsi->format = mdsi->format;
mdsi              739 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	dsi->mode_flags = mdsi->mode_flags;
mdsi              745 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 			   struct mipi_dsi_device *mdsi)
mdsi               83 drivers/gpu/drm/mcde/mcde_display.c 	if (mcde_dsi_irq(mcde->mdsi)) {
mdsi              640 drivers/gpu/drm/mcde/mcde_display.c 	if (mcde->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO)
mdsi              642 drivers/gpu/drm/mcde/mcde_display.c 	switch (mcde->mdsi->format) {
mdsi              836 drivers/gpu/drm/mcde/mcde_display.c 	if (!mcde->mdsi) {
mdsi              843 drivers/gpu/drm/mcde/mcde_display.c 		 (mcde->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO) ?
mdsi              845 drivers/gpu/drm/mcde/mcde_display.c 		 mipi_dsi_pixel_format_to_bpp(mcde->mdsi->format));
mdsi              847 drivers/gpu/drm/mcde/mcde_display.c 		mipi_dsi_pixel_format_to_bpp(mcde->mdsi->format) / 8;
mdsi              864 drivers/gpu/drm/mcde/mcde_display.c 	if (mcde->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO) {
mdsi              879 drivers/gpu/drm/mcde/mcde_display.c 	if (!(mcde->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO))
mdsi              963 drivers/gpu/drm/mcde/mcde_display.c 		mcde_dsi_te_request(mcde->mdsi);
mdsi               19 drivers/gpu/drm/mcde/mcde_drm.h 	struct mipi_dsi_device *mdsi;
mdsi               36 drivers/gpu/drm/mcde/mcde_drm.h bool mcde_dsi_irq(struct mipi_dsi_device *mdsi);
mdsi               37 drivers/gpu/drm/mcde/mcde_drm.h void mcde_dsi_te_request(struct mipi_dsi_device *mdsi);
mdsi               46 drivers/gpu/drm/mcde/mcde_dsi.c 	struct mipi_dsi_device *mdsi;
mdsi               72 drivers/gpu/drm/mcde/mcde_dsi.c bool mcde_dsi_irq(struct mipi_dsi_device *mdsi)
mdsi               78 drivers/gpu/drm/mcde/mcde_dsi.c 	d = host_to_mcde_dsi(mdsi->host);
mdsi              134 drivers/gpu/drm/mcde/mcde_dsi.c 				struct mipi_dsi_device *mdsi)
mdsi              138 drivers/gpu/drm/mcde/mcde_dsi.c 	if (mdsi->lanes < 1 || mdsi->lanes > 2) {
mdsi              143 drivers/gpu/drm/mcde/mcde_dsi.c 	dev_info(d->dev, "attached DSI device with %d lanes\n", mdsi->lanes);
mdsi              145 drivers/gpu/drm/mcde/mcde_dsi.c 	dev_info(d->dev, "format %08x, %dbpp\n", mdsi->format,
mdsi              146 drivers/gpu/drm/mcde/mcde_dsi.c 		 mipi_dsi_pixel_format_to_bpp(mdsi->format));
mdsi              147 drivers/gpu/drm/mcde/mcde_dsi.c 	dev_info(d->dev, "mode flags: %08lx\n", mdsi->mode_flags);
mdsi              149 drivers/gpu/drm/mcde/mcde_dsi.c 	d->mdsi = mdsi;
mdsi              151 drivers/gpu/drm/mcde/mcde_dsi.c 		d->mcde->mdsi = mdsi;
mdsi              157 drivers/gpu/drm/mcde/mcde_dsi.c 				struct mipi_dsi_device *mdsi)
mdsi              161 drivers/gpu/drm/mcde/mcde_dsi.c 	d->mdsi = NULL;
mdsi              163 drivers/gpu/drm/mcde/mcde_dsi.c 		d->mcde->mdsi = NULL;
mdsi              327 drivers/gpu/drm/mcde/mcde_dsi.c void mcde_dsi_te_request(struct mipi_dsi_device *mdsi)
mdsi              332 drivers/gpu/drm/mcde/mcde_dsi.c 	d = host_to_mcde_dsi(mdsi->host);
mdsi              368 drivers/gpu/drm/mcde/mcde_dsi.c 	u8 bpp = mipi_dsi_pixel_format_to_bpp(d->mdsi->format);
mdsi              378 drivers/gpu/drm/mcde/mcde_dsi.c 	if (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST)
mdsi              380 drivers/gpu/drm/mcde/mcde_dsi.c 	if (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) {
mdsi              385 drivers/gpu/drm/mcde/mcde_dsi.c 	switch (d->mdsi->format) {
mdsi              443 drivers/gpu/drm/mcde/mcde_dsi.c 	if (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) {
mdsi              492 drivers/gpu/drm/mcde/mcde_dsi.c 	bpl *= d->mdsi->lanes;
mdsi              498 drivers/gpu/drm/mcde/mcde_dsi.c 	if (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) {
mdsi              509 drivers/gpu/drm/mcde/mcde_dsi.c 	line_duration = (blkline_pck + 6) / d->mdsi->lanes;
mdsi              521 drivers/gpu/drm/mcde/mcde_dsi.c 	blkeol_duration = (blkeol_pck + 6) / d->mdsi->lanes;
mdsi              525 drivers/gpu/drm/mcde/mcde_dsi.c 	if (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) {
mdsi              578 drivers/gpu/drm/mcde/mcde_dsi.c 	if (d->mdsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET)
mdsi              606 drivers/gpu/drm/mcde/mcde_dsi.c 	if (d->mdsi->lanes == 2)
mdsi              608 drivers/gpu/drm/mcde/mcde_dsi.c 	if (!(d->mdsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS))
mdsi              632 drivers/gpu/drm/mcde/mcde_dsi.c 	if (d->mdsi->lanes == 2)
mdsi              641 drivers/gpu/drm/mcde/mcde_dsi.c 	if (d->mdsi->lanes == 2)
mdsi              687 drivers/gpu/drm/mcde/mcde_dsi.c 	if (!d->mdsi) {
mdsi              694 drivers/gpu/drm/mcde/mcde_dsi.c 		 (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO) ? "VIDEO" : "CMD"
mdsi              698 drivers/gpu/drm/mcde/mcde_dsi.c 	if (d->mdsi->lp_rate)
mdsi              699 drivers/gpu/drm/mcde/mcde_dsi.c 		lp_freq = d->mdsi->lp_rate;
mdsi              702 drivers/gpu/drm/mcde/mcde_dsi.c 	if (d->mdsi->hs_rate)
mdsi              703 drivers/gpu/drm/mcde/mcde_dsi.c 		hs_freq = d->mdsi->hs_rate;
mdsi              734 drivers/gpu/drm/mcde/mcde_dsi.c 	if (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO) {
mdsi              798 drivers/gpu/drm/mcde/mcde_dsi.c 	if (d->mdsi->mode_flags & MIPI_DSI_MODE_VIDEO) {
mdsi              903 drivers/gpu/drm/mcde/mcde_dsi.c 	if (d->mdsi)
mdsi              904 drivers/gpu/drm/mcde/mcde_dsi.c 		d->mcde->mdsi = d->mdsi;
mdsi              144 drivers/gpu/drm/msm/dsi/dsi_manager.c 	struct msm_dsi *mdsi = dsi_mgr_get_dsi(DSI_CLOCK_MASTER);
mdsi              154 drivers/gpu/drm/msm/dsi/dsi_manager.c 	if (IS_DUAL_DSI() && mdsi && sdsi) {
mdsi              155 drivers/gpu/drm/msm/dsi/dsi_manager.c 		if (!mdsi->phy_enabled && !sdsi->phy_enabled) {
mdsi              156 drivers/gpu/drm/msm/dsi/dsi_manager.c 			msm_dsi_host_reset_phy(mdsi->host);
mdsi              159 drivers/gpu/drm/msm/dsi/dsi_manager.c 			ret = enable_phy(mdsi, src_pll_id,
mdsi              166 drivers/gpu/drm/msm/dsi/dsi_manager.c 				msm_dsi_phy_disable(mdsi->phy);
mdsi              185 drivers/gpu/drm/msm/dsi/dsi_manager.c 	struct msm_dsi *mdsi = dsi_mgr_get_dsi(DSI_CLOCK_MASTER);
mdsi              193 drivers/gpu/drm/msm/dsi/dsi_manager.c 	if (IS_DUAL_DSI() && mdsi && sdsi) {
mdsi              194 drivers/gpu/drm/msm/dsi/dsi_manager.c 		if (!mdsi->phy_enabled && !sdsi->phy_enabled) {
mdsi              196 drivers/gpu/drm/msm/dsi/dsi_manager.c 			msm_dsi_phy_disable(mdsi->phy);