mdiv              150 arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h 	unsigned int mdiv, pdiv, sdiv;
mdiv              153 arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h 	mdiv = pllval >> S3C2443_PLLCON_MDIVSHIFT;
mdiv              157 arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h 	mdiv &= S3C2443_PLLCON_MDIVMASK;
mdiv              161 arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h 	fvco = (uint64_t)baseclk * (2 * (mdiv + 8));
mdiv              170 arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h 	unsigned int mdiv, pdiv, sdiv;
mdiv              173 arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h 	mdiv = pllval >> S3C2443_PLLCON_MDIVSHIFT;
mdiv              177 arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h 	mdiv &= S3C2443_PLLCON_MDIVMASK;
mdiv              181 arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h 	fvco = (uint64_t)baseclk * (mdiv + 8);
mdiv              311 arch/mips/netlogic/xlp/nlm_hal.c 	u32 mdiv, fdiv, pll_out_freq_den, reg_select, ref_div, pic_div;
mdiv              407 arch/mips/netlogic/xlp/nlm_hal.c 	mdiv = ctrl_val2 & 0xff;
mdiv              431 arch/mips/netlogic/xlp/nlm_hal.c 	pll_out_freq_num = ((ref_clk >> 1) * (6 + mdiv)) + fdiv;
mdiv               76 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x20, 0, 8),
mdiv               82 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x20, 10, 8),
mdiv               88 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x20, 20, 8),
mdiv               94 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x24, 0, 8),
mdiv              100 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x24, 10, 8),
mdiv              106 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x24, 20, 8),
mdiv              134 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x8, 0, 8),
mdiv              140 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x8, 10, 8),
mdiv              146 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x8, 20, 8),
mdiv              152 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0xc, 0, 8),
mdiv              158 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0xc, 10, 8),
mdiv              164 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0xc, 20, 8),
mdiv              212 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x20, 0, 8),
mdiv              218 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x20, 10, 8),
mdiv              224 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x20, 20, 8),
mdiv              230 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x24, 0, 8),
mdiv              236 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x24, 10, 8),
mdiv              242 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x24, 20, 8),
mdiv              292 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x14, 0, 8),
mdiv              298 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x18, 0, 8),
mdiv              304 drivers/clk/bcm/clk-cygnus.c 		.mdiv = REG_VAL(0x1c, 0, 8),
mdiv              119 drivers/clk/bcm/clk-iproc-armpll.c 	int mdiv;
mdiv              127 drivers/clk/bcm/clk-iproc-armpll.c 		mdiv = 1;
mdiv              132 drivers/clk/bcm/clk-iproc-armpll.c 		mdiv = val & IPROC_CLK_PLLARMC_MDIV_MASK;
mdiv              133 drivers/clk/bcm/clk-iproc-armpll.c 		if (mdiv == 0)
mdiv              134 drivers/clk/bcm/clk-iproc-armpll.c 			mdiv = 256;
mdiv              139 drivers/clk/bcm/clk-iproc-armpll.c 		mdiv = val & IPROC_CLK_PLLARMCTL5_H_MDIV_MASK;
mdiv              140 drivers/clk/bcm/clk-iproc-armpll.c 		if (mdiv == 0)
mdiv              141 drivers/clk/bcm/clk-iproc-armpll.c 			mdiv = 256;
mdiv              145 drivers/clk/bcm/clk-iproc-armpll.c 		mdiv = -EFAULT;
mdiv              148 drivers/clk/bcm/clk-iproc-armpll.c 	return mdiv;
mdiv              200 drivers/clk/bcm/clk-iproc-armpll.c 	int mdiv;
mdiv              224 drivers/clk/bcm/clk-iproc-armpll.c 	mdiv = __get_mdiv(pll);
mdiv              225 drivers/clk/bcm/clk-iproc-armpll.c 	if (mdiv <= 0) {
mdiv              230 drivers/clk/bcm/clk-iproc-armpll.c 	pll->rate = (pll->rate / pdiv) / mdiv;
mdiv              235 drivers/clk/bcm/clk-iproc-armpll.c 		 (unsigned int)(ndiv >> 20), pdiv, mdiv);
mdiv              627 drivers/clk/bcm/clk-iproc-pll.c 	unsigned int mdiv;
mdiv              633 drivers/clk/bcm/clk-iproc-pll.c 	val = readl(pll->control_base + ctrl->mdiv.offset);
mdiv              634 drivers/clk/bcm/clk-iproc-pll.c 	mdiv = (val >> ctrl->mdiv.shift) & bit_mask(ctrl->mdiv.width);
mdiv              635 drivers/clk/bcm/clk-iproc-pll.c 	if (mdiv == 0)
mdiv              636 drivers/clk/bcm/clk-iproc-pll.c 		mdiv = 256;
mdiv              639 drivers/clk/bcm/clk-iproc-pll.c 		rate = parent_rate / (mdiv * 2);
mdiv              641 drivers/clk/bcm/clk-iproc-pll.c 		rate = parent_rate / mdiv;
mdiv              687 drivers/clk/bcm/clk-iproc-pll.c 	val = readl(pll->control_base + ctrl->mdiv.offset);
mdiv              689 drivers/clk/bcm/clk-iproc-pll.c 		val &= ~(bit_mask(ctrl->mdiv.width) << ctrl->mdiv.shift);
mdiv              691 drivers/clk/bcm/clk-iproc-pll.c 		val &= ~(bit_mask(ctrl->mdiv.width) << ctrl->mdiv.shift);
mdiv              692 drivers/clk/bcm/clk-iproc-pll.c 		val |= div << ctrl->mdiv.shift;
mdiv              694 drivers/clk/bcm/clk-iproc-pll.c 	iproc_pll_write(pll, pll->control_base, ctrl->mdiv.offset, val);
mdiv              197 drivers/clk/bcm/clk-iproc.h 	struct iproc_clk_reg_op mdiv;
mdiv               62 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x18, 0, 8),
mdiv               68 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x18, 8, 8),
mdiv               74 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x14, 0, 8),
mdiv               80 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x14, 8, 8),
mdiv               86 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x14, 16, 8),
mdiv               92 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x14, 24, 8),
mdiv              124 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x18, 0, 8),
mdiv              130 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x18, 8, 8),
mdiv              136 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x14, 0, 8),
mdiv              142 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x14, 8, 8),
mdiv              148 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x14, 16, 8),
mdiv              154 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x14, 24, 8),
mdiv              186 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x14, 0, 8),
mdiv              192 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x14, 8, 8),
mdiv              198 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x10, 0, 8),
mdiv              204 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x10, 8, 8),
mdiv              210 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x10, 16, 8),
mdiv              216 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x10, 24, 8),
mdiv              248 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x14, 0, 8),
mdiv              254 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x14, 8, 8),
mdiv              260 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x10, 0, 8),
mdiv              266 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x10, 8, 8),
mdiv              272 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x10, 16, 8),
mdiv              278 drivers/clk/bcm/clk-ns2.c 		.mdiv = REG_VAL(0x10, 24, 8),
mdiv               61 drivers/clk/bcm/clk-nsp.c 		.mdiv = REG_VAL(0x18, 16, 8),
mdiv               67 drivers/clk/bcm/clk-nsp.c 		.mdiv = REG_VAL(0x18, 8, 8),
mdiv               73 drivers/clk/bcm/clk-nsp.c 		.mdiv = REG_VAL(0x18, 0, 8),
mdiv               79 drivers/clk/bcm/clk-nsp.c 		.mdiv = REG_VAL(0x1c, 16, 8),
mdiv               85 drivers/clk/bcm/clk-nsp.c 		.mdiv = REG_VAL(0x1c, 8, 8),
mdiv               91 drivers/clk/bcm/clk-nsp.c 		.mdiv = REG_VAL(0x1c, 0, 8),
mdiv              118 drivers/clk/bcm/clk-nsp.c 		.mdiv = REG_VAL(0x8, 24, 8),
mdiv              124 drivers/clk/bcm/clk-nsp.c 		.mdiv = REG_VAL(0x8, 16, 8),
mdiv              130 drivers/clk/bcm/clk-nsp.c 		.mdiv = REG_VAL(0x8, 8, 8),
mdiv               52 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x18, 0, 9),
mdiv               58 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x18, 10, 9),
mdiv               64 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x18, 20, 9),
mdiv               70 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x1c, 0, 9),
mdiv               76 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x1c, 10, 9),
mdiv               82 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x1c, 20, 9),
mdiv              112 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x18, 0, 9),
mdiv              118 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x18, 10, 9),
mdiv              124 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x18, 20, 9),
mdiv              130 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x1c, 0, 9),
mdiv              136 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x1c, 10, 9),
mdiv              141 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x1c, 20, 9),
mdiv              171 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x18, 0, 9),
mdiv              177 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x18, 10, 9),
mdiv              206 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x18, 0, 9),
mdiv              212 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x18, 10, 9),
mdiv              218 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x18, 20, 9),
mdiv              224 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x1c, 0, 9),
mdiv              230 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x1c, 10, 9),
mdiv              259 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x18, 0, 9),
mdiv              264 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x18, 10, 9),
mdiv              269 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x18, 20, 9),
mdiv              296 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x14, 0, 9),
mdiv              302 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x14, 10, 9),
mdiv              308 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x14, 20, 9),
mdiv              314 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x18, 0, 9),
mdiv              341 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x14, 0, 9),
mdiv              347 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x14, 10, 9),
mdiv              353 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x14, 20, 9),
mdiv              380 drivers/clk/bcm/clk-sr.c 		.mdiv = REG_VAL(0x14, 0, 9),
mdiv               77 drivers/clk/imx/clk-pll14xx.c 	u32 mdiv, pdiv, sdiv, pll_div;
mdiv               81 drivers/clk/imx/clk-pll14xx.c 	mdiv = (pll_div & MDIV_MASK) >> MDIV_SHIFT;
mdiv               85 drivers/clk/imx/clk-pll14xx.c 	fvco *= mdiv;
mdiv               95 drivers/clk/imx/clk-pll14xx.c 	u32 mdiv, pdiv, sdiv, pll_div_ctl0, pll_div_ctl1;
mdiv              101 drivers/clk/imx/clk-pll14xx.c 	mdiv = (pll_div_ctl0 & MDIV_MASK) >> MDIV_SHIFT;
mdiv              107 drivers/clk/imx/clk-pll14xx.c 	fvco *= (mdiv * 65536 + kdiv);
mdiv              123 drivers/clk/imx/clk-pll14xx.c 	return rate->mdiv != old_mdiv || rate->pdiv != old_pdiv;
mdiv              172 drivers/clk/imx/clk-pll14xx.c 	div_val = (rate->mdiv << MDIV_SHIFT) | (rate->pdiv << PDIV_SHIFT) |
mdiv              237 drivers/clk/imx/clk-pll14xx.c 	div_val = (rate->mdiv << MDIV_SHIFT) | (rate->pdiv << PDIV_SHIFT) |
mdiv               41 drivers/clk/imx/clk.h 	unsigned int mdiv;
mdiv              135 drivers/clk/imx/clk.h 		.mdiv	=	(_m),			\
mdiv              143 drivers/clk/imx/clk.h 		.mdiv	=	(_m),			\
mdiv              354 drivers/clk/nxp/clk-lpc18xx-cgu.c 	u32 ctrl, mdiv, msel, npdiv;
mdiv              357 drivers/clk/nxp/clk-lpc18xx-cgu.c 	mdiv = readl(pll->reg + LPC18XX_CGU_PLL0USB_MDIV);
mdiv              368 drivers/clk/nxp/clk-lpc18xx-cgu.c 	msel = lpc18xx_pll0_mdec2msel(mdiv & LPC18XX_PLL0_MDIV_MDEC_MASK);
mdiv              109 drivers/clk/samsung/clk-pll.c 	u32 pll_con, mdiv, pdiv, sdiv;
mdiv              113 drivers/clk/samsung/clk-pll.c 	mdiv = (pll_con >> PLL2126_MDIV_SHIFT) & PLL2126_MDIV_MASK;
mdiv              117 drivers/clk/samsung/clk-pll.c 	fvco *= (mdiv + 8);
mdiv              142 drivers/clk/samsung/clk-pll.c 	u32 pll_con, mdiv, pdiv, sdiv;
mdiv              146 drivers/clk/samsung/clk-pll.c 	mdiv = (pll_con >> PLL3000_MDIV_SHIFT) & PLL3000_MDIV_MASK;
mdiv              150 drivers/clk/samsung/clk-pll.c 	fvco *= (2 * (mdiv + 8));
mdiv              179 drivers/clk/samsung/clk-pll.c 	u32 mdiv, pdiv, sdiv, pll_con;
mdiv              183 drivers/clk/samsung/clk-pll.c 	mdiv = (pll_con >> PLL35XX_MDIV_SHIFT) & PLL35XX_MDIV_MASK;
mdiv              187 drivers/clk/samsung/clk-pll.c 	fvco *= mdiv;
mdiv              201 drivers/clk/samsung/clk-pll.c 	return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv);
mdiv              238 drivers/clk/samsung/clk-pll.c 	tmp |= (rate->mdiv << PLL35XX_MDIV_SHIFT) |
mdiv              286 drivers/clk/samsung/clk-pll.c 	u32 mdiv, pdiv, sdiv, pll_con0, pll_con1;
mdiv              292 drivers/clk/samsung/clk-pll.c 	mdiv = (pll_con0 >> PLL36XX_MDIV_SHIFT) & PLL36XX_MDIV_MASK;
mdiv              297 drivers/clk/samsung/clk-pll.c 	fvco *= (mdiv << 16) + kdiv;
mdiv              313 drivers/clk/samsung/clk-pll.c 	return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv ||
mdiv              350 drivers/clk/samsung/clk-pll.c 	pll_con0 |= (rate->mdiv << PLL36XX_MDIV_SHIFT) |
mdiv              404 drivers/clk/samsung/clk-pll.c 	u32 mdiv, pdiv, sdiv, pll_con;
mdiv              408 drivers/clk/samsung/clk-pll.c 	mdiv = (pll_con >> PLL45XX_MDIV_SHIFT) & PLL45XX_MDIV_MASK;
mdiv              415 drivers/clk/samsung/clk-pll.c 	fvco *= mdiv;
mdiv              430 drivers/clk/samsung/clk-pll.c 	return (old_mdiv != rate->mdiv || old_pdiv != rate->pdiv
mdiv              466 drivers/clk/samsung/clk-pll.c 	con0 |= (rate->mdiv << PLL45XX_MDIV_SHIFT) |
mdiv              551 drivers/clk/samsung/clk-pll.c 	u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1, shift;
mdiv              556 drivers/clk/samsung/clk-pll.c 	mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & ((pll->type == pll_1460x) ?
mdiv              565 drivers/clk/samsung/clk-pll.c 	fvco *= (mdiv << shift) + kdiv;
mdiv              581 drivers/clk/samsung/clk-pll.c 	return (old_mdiv != rate->mdiv || old_pdiv != rate->pdiv
mdiv              632 drivers/clk/samsung/clk-pll.c 	con0 |= (rate->mdiv << PLL46XX_MDIV_SHIFT) |
mdiv              694 drivers/clk/samsung/clk-pll.c 	u32 mdiv, pdiv, sdiv, pll_con;
mdiv              699 drivers/clk/samsung/clk-pll.c 		mdiv = (pll_con >> PLL6552_MDIV_SHIFT_2416) & PLL6552_MDIV_MASK;
mdiv              702 drivers/clk/samsung/clk-pll.c 		mdiv = (pll_con >> PLL6552_MDIV_SHIFT) & PLL6552_MDIV_MASK;
mdiv              707 drivers/clk/samsung/clk-pll.c 	fvco *= mdiv;
mdiv              734 drivers/clk/samsung/clk-pll.c 	u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1;
mdiv              739 drivers/clk/samsung/clk-pll.c 	mdiv = (pll_con0 >> PLL6553_MDIV_SHIFT) & PLL6553_MDIV_MASK;
mdiv              744 drivers/clk/samsung/clk-pll.c 	fvco *= (mdiv << 16) + kdiv;
mdiv              772 drivers/clk/samsung/clk-pll.c 	u32 pll_con, mdiv, pdiv, sdiv;
mdiv              776 drivers/clk/samsung/clk-pll.c 	mdiv = (pll_con >> PLLS3C2410_MDIV_SHIFT) & PLLS3C2410_MDIV_MASK;
mdiv              780 drivers/clk/samsung/clk-pll.c 	fvco *= (mdiv + 8);
mdiv              790 drivers/clk/samsung/clk-pll.c 	u32 pll_con, mdiv, pdiv, sdiv;
mdiv              794 drivers/clk/samsung/clk-pll.c 	mdiv = (pll_con >> PLLS3C2410_MDIV_SHIFT) & PLLS3C2410_MDIV_MASK;
mdiv              798 drivers/clk/samsung/clk-pll.c 	fvco *= (2 * (mdiv + 8));
mdiv              825 drivers/clk/samsung/clk-pll.c 	tmp |= (rate->mdiv << PLLS3C2410_MDIV_SHIFT) |
mdiv              976 drivers/clk/samsung/clk-pll.c 	u32 mdiv, pdiv, sdiv, pll_con;
mdiv              980 drivers/clk/samsung/clk-pll.c 	mdiv = (pll_con >> PLL2550XX_M_SHIFT) & PLL2550XX_M_MASK;
mdiv              984 drivers/clk/samsung/clk-pll.c 	fvco *= mdiv;
mdiv              990 drivers/clk/samsung/clk-pll.c static inline bool samsung_pll2550xx_mp_change(u32 mdiv, u32 pdiv, u32 pll_con)
mdiv              997 drivers/clk/samsung/clk-pll.c 	return mdiv != old_mdiv || pdiv != old_pdiv;
mdiv             1017 drivers/clk/samsung/clk-pll.c 	if (!(samsung_pll2550xx_mp_change(rate->mdiv, rate->pdiv, tmp))) {
mdiv             1033 drivers/clk/samsung/clk-pll.c 	tmp |= (rate->mdiv << PLL2550XX_M_SHIFT) |
mdiv             1082 drivers/clk/samsung/clk-pll.c 	u32 mdiv, pdiv, sdiv, pll_con0, pll_con1;
mdiv             1086 drivers/clk/samsung/clk-pll.c 	mdiv = (pll_con0 >> PLL2650X_M_SHIFT) & PLL2650X_M_MASK;
mdiv             1093 drivers/clk/samsung/clk-pll.c 	fout *= (mdiv << 16) + kdiv;
mdiv             1125 drivers/clk/samsung/clk-pll.c 	con0 |= (rate->mdiv << PLL2650X_M_SHIFT) |
mdiv             1177 drivers/clk/samsung/clk-pll.c 	u32 mdiv, pdiv, sdiv, pll_con0, pll_con2;
mdiv             1183 drivers/clk/samsung/clk-pll.c 	mdiv = (pll_con0 >> PLL2650XX_MDIV_SHIFT) & PLL2650XX_MDIV_MASK;
mdiv             1188 drivers/clk/samsung/clk-pll.c 	fvco *= (mdiv << 16) + kdiv;
mdiv             1216 drivers/clk/samsung/clk-pll.c 	pll_con0 |= rate->mdiv << PLL2650XX_MDIV_SHIFT;
mdiv               50 drivers/clk/samsung/clk-pll.h 		.mdiv	=	(_m),				\
mdiv               59 drivers/clk/samsung/clk-pll.h 		.mdiv	=	(_m),				\
mdiv               68 drivers/clk/samsung/clk-pll.h 		.mdiv	=	(_m),				\
mdiv               77 drivers/clk/samsung/clk-pll.h 		.mdiv	=	(_m),				\
mdiv               87 drivers/clk/samsung/clk-pll.h 		.mdiv	=	(_m),				\
mdiv               97 drivers/clk/samsung/clk-pll.h 		.mdiv	=	(_m),				\
mdiv              108 drivers/clk/samsung/clk-pll.h 		.mdiv	=	(_m),				\
mdiv              122 drivers/clk/samsung/clk-pll.h 	unsigned int mdiv;
mdiv               34 drivers/clk/socfpga/clk-pll-s10.c 	unsigned long mdiv;
mdiv               46 drivers/clk/socfpga/clk-pll-s10.c 	mdiv = (reg & SOCFPGA_PLL_MDIV_MASK) >> SOCFPGA_PLL_MDIV_SHIFT;
mdiv               47 drivers/clk/socfpga/clk-pll-s10.c 	vco_freq = (unsigned long long)vco_freq * (mdiv + 6);
mdiv               35 drivers/clk/st/clkgen-fsyn.c 	unsigned long mdiv;
mdiv               58 drivers/clk/st/clkgen-fsyn.c 	struct clkgen_field mdiv[QUADFS_MAX_CHAN];
mdiv               92 drivers/clk/st/clkgen-fsyn.c 	.mdiv	= { CLKGEN_FIELD(0x304, 0x1f, 15),
mdiv              143 drivers/clk/st/clkgen-fsyn.c 	.mdiv	= { CLKGEN_FIELD(0x2b4, 0x1f, 15),
mdiv              492 drivers/clk/st/clkgen-fsyn.c 	CLKGEN_WRITE(fs, mdiv[fs->chan], fs->md);
mdiv              577 drivers/clk/st/clkgen-fsyn.c 	res = (P20 * (32 + fs->mdiv) + 32 * fs->pe) * s * ns;
mdiv              601 drivers/clk/st/clkgen-fsyn.c 	fs_tmp.mdiv = (unsigned long) m;
mdiv              611 drivers/clk/st/clkgen-fsyn.c 		fs->mdiv = m;
mdiv              657 drivers/clk/st/clkgen-fsyn.c 		fs_tmp.mdiv = fs->mdiv;
mdiv              690 drivers/clk/st/clkgen-fsyn.c 	params->mdiv	= CLKGEN_READ(fs, mdiv[fs->chan]);
mdiv              702 drivers/clk/st/clkgen-fsyn.c 	if (!params->mdiv && !params->pe && !params->sdiv)
mdiv              705 drivers/clk/st/clkgen-fsyn.c 	fs->md = params->mdiv;
mdiv              764 drivers/clk/st/clkgen-fsyn.c 		 rate, (unsigned int)params.sdiv, (unsigned int)params.mdiv,
mdiv              774 drivers/clk/st/clkgen-fsyn.c 	fs->md = params->mdiv;
mdiv               45 drivers/clk/st/clkgen-pll.c 	struct clkgen_field mdiv;
mdiv              157 drivers/clk/st/clkgen-pll.c 	unsigned long mdiv;
mdiv             1159 drivers/clk/tegra/clk-pll.c 	u16 mdiv = parent_rate / pll_params->cf_min;
mdiv             1162 drivers/clk/tegra/clk-pll.c 		return (!pll_params->mdiv_default ? mdiv :
mdiv             1163 drivers/clk/tegra/clk-pll.c 			min(mdiv, pll_params->mdiv_default));
mdiv              175 drivers/cpufreq/tegra186-cpufreq.c 			data->mdiv / 1000;
mdiv             7743 drivers/gpu/drm/i915/display/intel_display.c 	u32 mdiv;
mdiv             7782 drivers/gpu/drm/i915/display/intel_display.c 	mdiv = ((bestm1 << DPIO_M1DIV_SHIFT) | (bestm2 & DPIO_M2DIV_MASK));
mdiv             7783 drivers/gpu/drm/i915/display/intel_display.c 	mdiv |= ((bestp1 << DPIO_P1_SHIFT) | (bestp2 << DPIO_P2_SHIFT));
mdiv             7784 drivers/gpu/drm/i915/display/intel_display.c 	mdiv |= ((bestn << DPIO_N_SHIFT));
mdiv             7785 drivers/gpu/drm/i915/display/intel_display.c 	mdiv |= (1 << DPIO_K_SHIFT);
mdiv             7792 drivers/gpu/drm/i915/display/intel_display.c 	mdiv |= (DPIO_POST_DIV_HDMIDP << DPIO_POST_DIV_SHIFT);
mdiv             7793 drivers/gpu/drm/i915/display/intel_display.c 	vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW3(pipe), mdiv);
mdiv             7795 drivers/gpu/drm/i915/display/intel_display.c 	mdiv |= DPIO_ENABLE_CALIBRATION;
mdiv             7796 drivers/gpu/drm/i915/display/intel_display.c 	vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW3(pipe), mdiv);
mdiv             8568 drivers/gpu/drm/i915/display/intel_display.c 	u32 mdiv;
mdiv             8576 drivers/gpu/drm/i915/display/intel_display.c 	mdiv = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW3(pipe));
mdiv             8579 drivers/gpu/drm/i915/display/intel_display.c 	clock.m1 = (mdiv >> DPIO_M1DIV_SHIFT) & 7;
mdiv             8580 drivers/gpu/drm/i915/display/intel_display.c 	clock.m2 = mdiv & DPIO_M2DIV_MASK;
mdiv             8581 drivers/gpu/drm/i915/display/intel_display.c 	clock.n = (mdiv >> DPIO_N_SHIFT) & 0xf;
mdiv             8582 drivers/gpu/drm/i915/display/intel_display.c 	clock.p1 = (mdiv >> DPIO_P1_SHIFT) & 7;
mdiv             8583 drivers/gpu/drm/i915/display/intel_display.c 	clock.p2 = (mdiv >> DPIO_P2_SHIFT) & 0x1f;
mdiv               80 drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h 	int mdiv;
mdiv              126 drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c 	args->v0.min = lo / domain->mdiv;
mdiv              127 drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c 	args->v0.max = hi / domain->mdiv;
mdiv              372 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 			lo /= clock->mdiv;
mdiv              373 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 			hi /= clock->mdiv;
mdiv               35 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c 	u32 mdiv;
mdiv              307 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c 			info->mdiv |= 0x80000000;
mdiv              308 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c 			info->mdiv |= div1D;
mdiv              314 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c 			info->mdiv |= 0x80000000;
mdiv              315 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c 			info->mdiv |= div1P << 8;
mdiv              412 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c 	nvkm_mask(device, 0x137250 + (idx * 0x04), 0x00003f3f, info->mdiv);
mdiv               35 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c 	u32 mdiv;
mdiv              320 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c 			info->mdiv |= 0x80000000;
mdiv              321 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c 			info->mdiv |= div1D;
mdiv              327 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c 			info->mdiv |= 0x80000000;
mdiv              328 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c 			info->mdiv |= div1P << 8;
mdiv              416 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c 		nvkm_mask(device, 0x137250 + (idx * 0x04), 0x00003f00, info->mdiv);
mdiv              418 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c 		nvkm_mask(device, 0x137250 + (idx * 0x04), 0x0000003f, info->mdiv);
mdiv              661 drivers/i2c/busses/i2c-octeon-core.c 	int thp = 0x18, mdiv = 2, ndiv = 0, delta_hz = 1000000;
mdiv              689 drivers/i2c/busses/i2c-octeon-core.c 					mdiv = mdiv_idx;
mdiv              696 drivers/i2c/busses/i2c-octeon-core.c 	octeon_i2c_reg_write(i2c, SW_TWSI_EOP_TWSI_CLKCTL, (mdiv << 3) | ndiv);
mdiv              134 drivers/iio/frequency/adf4350.c 	u16 mdiv, r_cnt = 0;
mdiv              142 drivers/iio/frequency/adf4350.c 		mdiv = 75;
mdiv              145 drivers/iio/frequency/adf4350.c 		mdiv = 23;
mdiv              181 drivers/iio/frequency/adf4350.c 	} while (mdiv > st->r0_int);
mdiv              172 drivers/media/dvb-frontends/horus3a.c 	u8 mdiv = 0;
mdiv              190 drivers/media/dvb-frontends/horus3a.c 		mdiv = 1;
mdiv              193 drivers/media/dvb-frontends/horus3a.c 		mdiv = 0;
mdiv              296 drivers/media/dvb-frontends/horus3a.c 	data[4] = (u8)(mdiv << 7);
mdiv              559 drivers/media/dvb-frontends/stb0899_drv.c 	u8 mdiv = 0;
mdiv              562 drivers/media/dvb-frontends/stb0899_drv.c 	mdiv = ((6 * Mclk) / state->config->xtal_freq) - 1;
mdiv              563 drivers/media/dvb-frontends/stb0899_drv.c 	dprintk(state->verbose, FE_DEBUG, 1, "mdiv=%d", mdiv);
mdiv              565 drivers/media/dvb-frontends/stb0899_drv.c 	stb0899_write_reg(state, STB0899_NCOARSE, mdiv);
mdiv              417 drivers/video/fbdev/savage/savagefb_driver.c 			    long freq_max, unsigned int *mdiv,
mdiv              459 drivers/video/fbdev/savage/savagefb_driver.c 	*mdiv = best_m - 2;
mdiv              464 drivers/video/fbdev/savage/savagefb_driver.c 			     long freq_max, unsigned char *mdiv,
mdiv              500 drivers/video/fbdev/savage/savagefb_driver.c 	*mdiv = best_m - 2;
mdiv             1633 include/soc/tegra/bpmp-abi.h 	uint16_t mdiv; /**< input divider value */
mdiv             1789 include/soc/tegra/bpmp-abi.h 	uint16_t mdiv;
mdiv              268 sound/soc/sunxi/sun4i-i2s.c 		const struct sun4i_i2s_clk_div *mdiv = &dividers[i];
mdiv              270 sound/soc/sunxi/sun4i-i2s.c 		if (mdiv->div == div)
mdiv              271 sound/soc/sunxi/sun4i-i2s.c 			return mdiv->val;