mcopt1            836 drivers/edac/ppc4xx_edac.c static enum dev_type ppc4xx_edac_get_dtype(u32 mcopt1)
mcopt1            838 drivers/edac/ppc4xx_edac.c 	switch (mcopt1 & SDRAM_MCOPT1_WDTH_MASK) {
mcopt1            859 drivers/edac/ppc4xx_edac.c static enum mem_type ppc4xx_edac_get_mtype(u32 mcopt1)
mcopt1            861 drivers/edac/ppc4xx_edac.c 	bool rden = ((mcopt1 & SDRAM_MCOPT1_RDEN_MASK) == SDRAM_MCOPT1_RDEN);
mcopt1            863 drivers/edac/ppc4xx_edac.c 	switch (mcopt1 & SDRAM_MCOPT1_DDR_TYPE_MASK) {
mcopt1            889 drivers/edac/ppc4xx_edac.c static int ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1)
mcopt1            901 drivers/edac/ppc4xx_edac.c 	mtype = ppc4xx_edac_get_mtype(mcopt1);
mcopt1            902 drivers/edac/ppc4xx_edac.c 	dtype = ppc4xx_edac_get_dtype(mcopt1);
mcopt1           1008 drivers/edac/ppc4xx_edac.c 			       const dcr_host_t *dcr_host, u32 mcopt1)
mcopt1           1011 drivers/edac/ppc4xx_edac.c 	const u32 memcheck = (mcopt1 & SDRAM_MCOPT1_MCHK_MASK);
mcopt1           1071 drivers/edac/ppc4xx_edac.c 	status = ppc4xx_edac_init_csrows(mci, mcopt1);
mcopt1           1225 drivers/edac/ppc4xx_edac.c 	u32 mcopt1, memcheck;
mcopt1           1260 drivers/edac/ppc4xx_edac.c 	mcopt1 = mfsdram(&dcr_host, SDRAM_MCOPT1);
mcopt1           1261 drivers/edac/ppc4xx_edac.c 	memcheck = (mcopt1 & SDRAM_MCOPT1_MCHK_MASK);
mcopt1           1291 drivers/edac/ppc4xx_edac.c 	status = ppc4xx_edac_mc_init(mci, op, &dcr_host, mcopt1);