mclk_switch_limit  278 drivers/gpu/drm/radeon/cypress_dpm.c 	u32 mclk_switch_limit;
mclk_switch_limit  281 drivers/gpu/drm/radeon/cypress_dpm.c 	mclk_switch_limit = (460 * reference_clock) / 100;
mclk_switch_limit  285 drivers/gpu/drm/radeon/cypress_dpm.c 				      mclk_switch_limit);
mclk_switch_limit 1225 drivers/gpu/drm/radeon/ni_dpm.c 	u32 vddc_dly, bb_dly, acpi_dly, vbi_dly, mclk_switch_limit;
mclk_switch_limit 1249 drivers/gpu/drm/radeon/ni_dpm.c 	mclk_switch_limit = (460 * reference_clock) / 100;
mclk_switch_limit 1256 drivers/gpu/drm/radeon/ni_dpm.c 	rv770_write_smc_soft_register(rdev, NI_SMC_SOFT_REGISTER_mclk_switch_lim, mclk_switch_limit);