MSIOF3_SS1_B 275 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) FM(DU_DB4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) MSIOF3_SS1_B 760 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1), MSIOF3_SS1_B 276 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) FM(DU_DB4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) MSIOF3_SS1_B 767 drivers/pinctrl/sh-pfc/pfc-r8a7795.c PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1), MSIOF3_SS1_B 278 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) FM(DU_DB4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) MSIOF3_SS1_B 770 drivers/pinctrl/sh-pfc/pfc-r8a7796.c PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1), MSIOF3_SS1_B 279 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) FM(DU_DB4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) MSIOF3_SS1_B 773 drivers/pinctrl/sh-pfc/pfc-r8a77965.c PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1), MSIOF3_SS1_B 237 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define IP2_31_28 FM(A0) FM(IRQ0) FM(PWM2_A) FM(MSIOF3_SS1_B) FM(VI5_CLK_A) FM(DU_CDE) FM(HRX3_D) FM(IERX) FM(QSTB_QHE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) MSIOF3_SS1_B 656 drivers/pinctrl/sh-pfc/pfc-r8a77990.c PINMUX_IPSR_MSEL(IP2_31_28, MSIOF3_SS1_B, SEL_MSIOF3_1), MSIOF3_SS1_B 212 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define IP1_23_20 FM(DU_DB6) FM(LCDOUT6) FM(MSIOF3_SS1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) MSIOF3_SS1_B 576 drivers/pinctrl/sh-pfc/pfc-r8a77995.c PINMUX_IPSR_MSEL(IP1_23_20, MSIOF3_SS1_B, SEL_MSIOF3_1),