mc_reg_table_entry 1620 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 							reg_table->mc_reg_table_entry[num_ranges].mclk_max =
mc_reg_table_entry 1625 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 									reg_table->mc_reg_table_entry[num_ranges].mc_data[i] =
mc_reg_table_entry 1629 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 									reg_table->mc_reg_table_entry[num_ranges].mc_data[i] =
mc_reg_table_entry 1630 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 										reg_table->mc_reg_table_entry[num_ranges].mc_data[i - 1];
mc_reg_table_entry  115 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h 	struct atom_mc_reg_entry mc_reg_table_entry[VBIOS_MAX_AC_TIMING_ENTRIES];
mc_reg_table_entry 5831 drivers/gpu/drm/amd/amdgpu/si_dpm.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 5833 drivers/gpu/drm/amd/amdgpu/si_dpm.c 					((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16);
mc_reg_table_entry 5842 drivers/gpu/drm/amd/amdgpu/si_dpm.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 5844 drivers/gpu/drm/amd/amdgpu/si_dpm.c 					(table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
mc_reg_table_entry 5846 drivers/gpu/drm/amd/amdgpu/si_dpm.c 					table->mc_reg_table_entry[k].mc_data[j] |= 0x100;
mc_reg_table_entry 5856 drivers/gpu/drm/amd/amdgpu/si_dpm.c 					table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 5857 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						(table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16;
mc_reg_table_entry 5866 drivers/gpu/drm/amd/amdgpu/si_dpm.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 5868 drivers/gpu/drm/amd/amdgpu/si_dpm.c 					(table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
mc_reg_table_entry 5941 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			if (table->mc_reg_table_entry[j-1].mc_data[i] != table->mc_reg_table_entry[j].mc_data[i]) {
mc_reg_table_entry 5975 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		si_table->mc_reg_table_entry[i].mclk_max =
mc_reg_table_entry 5976 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			table->mc_reg_table_entry[i].mclk_max;
mc_reg_table_entry 5978 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_table->mc_reg_table_entry[i].mc_data[j] =
mc_reg_table_entry 5979 drivers/gpu/drm/amd/amdgpu/si_dpm.c 				table->mc_reg_table_entry[i].mc_data[j];
mc_reg_table_entry 6079 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if (pl->mclk <= si_pi->mc_reg_table.mc_reg_table_entry[i].mclk_max)
mc_reg_table_entry 6086 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	si_convert_mc_registers(&si_pi->mc_reg_table.mc_reg_table_entry[i],
mc_reg_table_entry 6122 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	si_convert_mc_registers(&si_pi->mc_reg_table.mc_reg_table_entry[0],
mc_reg_table_entry 6131 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		si_convert_mc_registers(&si_pi->mc_reg_table.mc_reg_table_entry[0],
mc_reg_table_entry  278 drivers/gpu/drm/amd/amdgpu/si_dpm.h 	struct evergreen_mc_reg_entry mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
mc_reg_table_entry  624 drivers/gpu/drm/amd/amdgpu/si_dpm.h 	struct ni_mc_reg_entry mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
mc_reg_table_entry  932 drivers/gpu/drm/amd/amdgpu/si_dpm.h 	struct si_mc_reg_entry mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
mc_reg_table_entry   64 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 			table->mc_reg_table_entry[num_ranges].mclk_max =
mc_reg_table_entry   71 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 					table->mc_reg_table_entry[num_ranges].mc_data[i] =
mc_reg_table_entry   76 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 					table->mc_reg_table_entry[num_ranges].mc_data[i] =
mc_reg_table_entry   77 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 						table->mc_reg_table_entry[num_ranges].mc_data[i-1];
mc_reg_table_entry  250 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	pp_atomctrl_mc_reg_entry        mc_reg_table_entry[VBIOS_MAX_AC_TIMING_ENTRIES];
mc_reg_table_entry 1771 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			smu_data->mc_reg_table.mc_reg_table_entry[i].mclk_max) {
mc_reg_table_entry 1779 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	ci_convert_mc_registers(&smu_data->mc_reg_table.mc_reg_table_entry[i],
mc_reg_table_entry 2567 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		ni_table->mc_reg_table_entry[i].mclk_max =
mc_reg_table_entry 2568 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			table->mc_reg_table_entry[i].mclk_max;
mc_reg_table_entry 2570 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			ni_table->mc_reg_table_entry[i].mc_data[j] =
mc_reg_table_entry 2571 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				table->mc_reg_table_entry[i].mc_data[j];
mc_reg_table_entry 2598 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 2600 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 					((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16);
mc_reg_table_entry 2610 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 2612 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 					(table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
mc_reg_table_entry 2615 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 					table->mc_reg_table_entry[k].mc_data[j] |= 0x100;
mc_reg_table_entry 2625 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 					table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 2626 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 						(table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16;
mc_reg_table_entry 2638 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 2640 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 					(table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
mc_reg_table_entry 2662 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			if (table->mc_reg_table_entry[j-1].mc_data[i] !=
mc_reg_table_entry 2663 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				table->mc_reg_table_entry[j].mc_data[i]) {
mc_reg_table_entry   57 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.h 	struct ci_mc_reg_entry    mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
mc_reg_table_entry 1738 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			smu_data->mc_reg_table.mc_reg_table_entry[i].mclk_max) {
mc_reg_table_entry 1746 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	iceland_convert_mc_registers(&smu_data->mc_reg_table.mc_reg_table_entry[i],
mc_reg_table_entry 2496 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 		ni_table->mc_reg_table_entry[i].mclk_max =
mc_reg_table_entry 2497 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			table->mc_reg_table_entry[i].mclk_max;
mc_reg_table_entry 2499 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			ni_table->mc_reg_table_entry[i].mc_data[j] =
mc_reg_table_entry 2500 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				table->mc_reg_table_entry[i].mc_data[j];
mc_reg_table_entry 2527 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 2529 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 					((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16);
mc_reg_table_entry 2539 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 2541 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 					(table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
mc_reg_table_entry 2544 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 					table->mc_reg_table_entry[k].mc_data[j] |= 0x100;
mc_reg_table_entry 2555 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 					table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 2556 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 						(table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16;
mc_reg_table_entry 2568 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 2570 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 					(table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
mc_reg_table_entry 2591 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			if (table->mc_reg_table_entry[j-1].mc_data[i] !=
mc_reg_table_entry 2592 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				table->mc_reg_table_entry[j].mc_data[i]) {
mc_reg_table_entry   56 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h 	struct iceland_mc_reg_entry    mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
mc_reg_table_entry 2117 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			smu_data->mc_reg_table.mc_reg_table_entry[i].mclk_max) {
mc_reg_table_entry 2125 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	tonga_convert_mc_registers(&smu_data->mc_reg_table.mc_reg_table_entry[i],
mc_reg_table_entry 2959 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		ni_table->mc_reg_table_entry[i].mclk_max =
mc_reg_table_entry 2960 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			table->mc_reg_table_entry[i].mclk_max;
mc_reg_table_entry 2962 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			ni_table->mc_reg_table_entry[i].mc_data[j] =
mc_reg_table_entry 2963 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				table->mc_reg_table_entry[i].mc_data[j];
mc_reg_table_entry 2991 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 2993 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 					((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16);
mc_reg_table_entry 3003 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 3005 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 					(table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
mc_reg_table_entry 3008 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 					table->mc_reg_table_entry[k].mc_data[j] |= 0x100;
mc_reg_table_entry 3018 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 					table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 3019 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 						(table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16;
mc_reg_table_entry 3030 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 3032 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 					(table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
mc_reg_table_entry 3054 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			if (table->mc_reg_table_entry[j-1].mc_data[i] !=
mc_reg_table_entry 3055 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				table->mc_reg_table_entry[j].mc_data[i]) {
mc_reg_table_entry   58 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.h 	struct tonga_mc_reg_entry    mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
mc_reg_table_entry 1908 drivers/gpu/drm/radeon/btc_dpm.c 			if (table->mc_reg_table_entry[j-1].mc_data[i] !=
mc_reg_table_entry 1909 drivers/gpu/drm/radeon/btc_dpm.c 			    table->mc_reg_table_entry[j].mc_data[i]) {
mc_reg_table_entry 1931 drivers/gpu/drm/radeon/btc_dpm.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 1933 drivers/gpu/drm/radeon/btc_dpm.c 					((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16);
mc_reg_table_entry 1944 drivers/gpu/drm/radeon/btc_dpm.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 1946 drivers/gpu/drm/radeon/btc_dpm.c 					(table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
mc_reg_table_entry 1948 drivers/gpu/drm/radeon/btc_dpm.c 					table->mc_reg_table_entry[k].mc_data[j] |= 0x100;
mc_reg_table_entry 1960 drivers/gpu/drm/radeon/btc_dpm.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 1962 drivers/gpu/drm/radeon/btc_dpm.c 					(table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
mc_reg_table_entry 2007 drivers/gpu/drm/radeon/btc_dpm.c 		eg_table->mc_reg_table_entry[i].mclk_max =
mc_reg_table_entry 2008 drivers/gpu/drm/radeon/btc_dpm.c 			table->mc_reg_table_entry[i].mclk_max;
mc_reg_table_entry 2010 drivers/gpu/drm/radeon/btc_dpm.c 			eg_table->mc_reg_table_entry[i].mc_data[j] =
mc_reg_table_entry 2011 drivers/gpu/drm/radeon/btc_dpm.c 				table->mc_reg_table_entry[i].mc_data[j];
mc_reg_table_entry 4352 drivers/gpu/drm/radeon/ci_dpm.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 4353 drivers/gpu/drm/radeon/ci_dpm.c 					((temp_reg & 0xffff0000)) | ((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16);
mc_reg_table_entry 4363 drivers/gpu/drm/radeon/ci_dpm.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 4364 drivers/gpu/drm/radeon/ci_dpm.c 					(temp_reg & 0xffff0000) | (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
mc_reg_table_entry 4366 drivers/gpu/drm/radeon/ci_dpm.c 					table->mc_reg_table_entry[k].mc_data[j] |= 0x100;
mc_reg_table_entry 4376 drivers/gpu/drm/radeon/ci_dpm.c 					table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 4377 drivers/gpu/drm/radeon/ci_dpm.c 						(table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16;
mc_reg_table_entry 4389 drivers/gpu/drm/radeon/ci_dpm.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 4390 drivers/gpu/drm/radeon/ci_dpm.c 					(temp_reg & 0xffff0000) | (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
mc_reg_table_entry 4486 drivers/gpu/drm/radeon/ci_dpm.c 			if (table->mc_reg_table_entry[j-1].mc_data[i] !=
mc_reg_table_entry 4487 drivers/gpu/drm/radeon/ci_dpm.c 			    table->mc_reg_table_entry[j].mc_data[i]) {
mc_reg_table_entry 4523 drivers/gpu/drm/radeon/ci_dpm.c 		ci_table->mc_reg_table_entry[i].mclk_max =
mc_reg_table_entry 4524 drivers/gpu/drm/radeon/ci_dpm.c 			table->mc_reg_table_entry[i].mclk_max;
mc_reg_table_entry 4526 drivers/gpu/drm/radeon/ci_dpm.c 			ci_table->mc_reg_table_entry[i].mc_data[j] =
mc_reg_table_entry 4527 drivers/gpu/drm/radeon/ci_dpm.c 				table->mc_reg_table_entry[i].mc_data[j];
mc_reg_table_entry 4553 drivers/gpu/drm/radeon/ci_dpm.c 					if ((table->mc_reg_table_entry[k].mclk_max == 125000) ||
mc_reg_table_entry 4554 drivers/gpu/drm/radeon/ci_dpm.c 					    (table->mc_reg_table_entry[k].mclk_max == 137500))
mc_reg_table_entry 4555 drivers/gpu/drm/radeon/ci_dpm.c 						table->mc_reg_table_entry[k].mc_data[i] =
mc_reg_table_entry 4556 drivers/gpu/drm/radeon/ci_dpm.c 							(table->mc_reg_table_entry[k].mc_data[i] & 0xFFFFFFF8) |
mc_reg_table_entry 4562 drivers/gpu/drm/radeon/ci_dpm.c 					if ((table->mc_reg_table_entry[k].mclk_max == 125000) ||
mc_reg_table_entry 4563 drivers/gpu/drm/radeon/ci_dpm.c 					    (table->mc_reg_table_entry[k].mclk_max == 137500))
mc_reg_table_entry 4564 drivers/gpu/drm/radeon/ci_dpm.c 						table->mc_reg_table_entry[k].mc_data[i] =
mc_reg_table_entry 4565 drivers/gpu/drm/radeon/ci_dpm.c 							(table->mc_reg_table_entry[k].mc_data[i] & 0xFFFF0F00) |
mc_reg_table_entry 4571 drivers/gpu/drm/radeon/ci_dpm.c 					if ((table->mc_reg_table_entry[k].mclk_max == 125000) ||
mc_reg_table_entry 4572 drivers/gpu/drm/radeon/ci_dpm.c 					    (table->mc_reg_table_entry[k].mclk_max == 137500))
mc_reg_table_entry 4573 drivers/gpu/drm/radeon/ci_dpm.c 						table->mc_reg_table_entry[k].mc_data[i] =
mc_reg_table_entry 4574 drivers/gpu/drm/radeon/ci_dpm.c 							(table->mc_reg_table_entry[k].mc_data[i] & 0xFFFF0F00) |
mc_reg_table_entry 4580 drivers/gpu/drm/radeon/ci_dpm.c 					if ((table->mc_reg_table_entry[k].mclk_max == 125000) ||
mc_reg_table_entry 4581 drivers/gpu/drm/radeon/ci_dpm.c 					    (table->mc_reg_table_entry[k].mclk_max == 137500))
mc_reg_table_entry 4582 drivers/gpu/drm/radeon/ci_dpm.c 						table->mc_reg_table_entry[k].mc_data[i] = 0;
mc_reg_table_entry 4587 drivers/gpu/drm/radeon/ci_dpm.c 					if (table->mc_reg_table_entry[k].mclk_max == 125000)
mc_reg_table_entry 4588 drivers/gpu/drm/radeon/ci_dpm.c 						table->mc_reg_table_entry[k].mc_data[i] =
mc_reg_table_entry 4589 drivers/gpu/drm/radeon/ci_dpm.c 							(table->mc_reg_table_entry[k].mc_data[i] & 0xFFE0FE0F) |
mc_reg_table_entry 4591 drivers/gpu/drm/radeon/ci_dpm.c 					else if (table->mc_reg_table_entry[k].mclk_max == 137500)
mc_reg_table_entry 4592 drivers/gpu/drm/radeon/ci_dpm.c 						table->mc_reg_table_entry[k].mc_data[i] =
mc_reg_table_entry 4593 drivers/gpu/drm/radeon/ci_dpm.c 							(table->mc_reg_table_entry[k].mc_data[i] & 0xFFE0FE0F) |
mc_reg_table_entry 4599 drivers/gpu/drm/radeon/ci_dpm.c 					if (table->mc_reg_table_entry[k].mclk_max == 125000)
mc_reg_table_entry 4600 drivers/gpu/drm/radeon/ci_dpm.c 						table->mc_reg_table_entry[k].mc_data[i] =
mc_reg_table_entry 4601 drivers/gpu/drm/radeon/ci_dpm.c 							(table->mc_reg_table_entry[k].mc_data[i] & 0xFFFFFFE0) |
mc_reg_table_entry 4603 drivers/gpu/drm/radeon/ci_dpm.c 					else if (table->mc_reg_table_entry[k].mclk_max == 137500)
mc_reg_table_entry 4604 drivers/gpu/drm/radeon/ci_dpm.c 						table->mc_reg_table_entry[k].mc_data[i] =
mc_reg_table_entry 4605 drivers/gpu/drm/radeon/ci_dpm.c 							(table->mc_reg_table_entry[k].mc_data[i] & 0xFFFFFFE0) |
mc_reg_table_entry 4726 drivers/gpu/drm/radeon/ci_dpm.c 		if (memory_clock <= pi->mc_reg_table.mc_reg_table_entry[i].mclk_max)
mc_reg_table_entry 4733 drivers/gpu/drm/radeon/ci_dpm.c 	ci_convert_mc_registers(&pi->mc_reg_table.mc_reg_table_entry[i],
mc_reg_table_entry   86 drivers/gpu/drm/radeon/ci_dpm.h 	struct ci_mc_reg_entry mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
mc_reg_table_entry  837 drivers/gpu/drm/radeon/cypress_dpm.c 		    eg_pi->mc_reg_table.mc_reg_table_entry[i].mclk_max)
mc_reg_table_entry  844 drivers/gpu/drm/radeon/cypress_dpm.c 	cypress_convert_mc_registers(&eg_pi->mc_reg_table.mc_reg_table_entry[i],
mc_reg_table_entry 1050 drivers/gpu/drm/radeon/cypress_dpm.c 		eg_pi->mc_reg_table.mc_reg_table_entry[i].mclk_max =
mc_reg_table_entry 1054 drivers/gpu/drm/radeon/cypress_dpm.c 							 &eg_pi->mc_reg_table.mc_reg_table_entry[i]);
mc_reg_table_entry 1062 drivers/gpu/drm/radeon/cypress_dpm.c 			if (eg_pi->mc_reg_table.mc_reg_table_entry[j-1].mc_data[i] !=
mc_reg_table_entry 1063 drivers/gpu/drm/radeon/cypress_dpm.c 			    eg_pi->mc_reg_table.mc_reg_table_entry[j].mc_data[i]) {
mc_reg_table_entry 1681 drivers/gpu/drm/radeon/cypress_dpm.c 	cypress_convert_mc_registers(&eg_pi->mc_reg_table.mc_reg_table_entry[0],
mc_reg_table_entry   38 drivers/gpu/drm/radeon/cypress_dpm.h 	struct evergreen_mc_reg_entry mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
mc_reg_table_entry 2725 drivers/gpu/drm/radeon/ni_dpm.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 2727 drivers/gpu/drm/radeon/ni_dpm.c 					((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16);
mc_reg_table_entry 2736 drivers/gpu/drm/radeon/ni_dpm.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 2738 drivers/gpu/drm/radeon/ni_dpm.c 					(table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
mc_reg_table_entry 2740 drivers/gpu/drm/radeon/ni_dpm.c 					table->mc_reg_table_entry[k].mc_data[j] |= 0x100;
mc_reg_table_entry 2751 drivers/gpu/drm/radeon/ni_dpm.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 2753 drivers/gpu/drm/radeon/ni_dpm.c 					(table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
mc_reg_table_entry 2826 drivers/gpu/drm/radeon/ni_dpm.c 			if (table->mc_reg_table_entry[j-1].mc_data[i] != table->mc_reg_table_entry[j].mc_data[i]) {
mc_reg_table_entry 2860 drivers/gpu/drm/radeon/ni_dpm.c 		ni_table->mc_reg_table_entry[i].mclk_max =
mc_reg_table_entry 2861 drivers/gpu/drm/radeon/ni_dpm.c 			table->mc_reg_table_entry[i].mclk_max;
mc_reg_table_entry 2863 drivers/gpu/drm/radeon/ni_dpm.c 			ni_table->mc_reg_table_entry[i].mc_data[j] =
mc_reg_table_entry 2864 drivers/gpu/drm/radeon/ni_dpm.c 				table->mc_reg_table_entry[i].mc_data[j];
mc_reg_table_entry 2965 drivers/gpu/drm/radeon/ni_dpm.c 		if (pl->mclk <= ni_pi->mc_reg_table.mc_reg_table_entry[i].mclk_max)
mc_reg_table_entry 2972 drivers/gpu/drm/radeon/ni_dpm.c 	ni_convert_mc_registers(&ni_pi->mc_reg_table.mc_reg_table_entry[i],
mc_reg_table_entry 3010 drivers/gpu/drm/radeon/ni_dpm.c 	ni_convert_mc_registers(&ni_pi->mc_reg_table.mc_reg_table_entry[0],
mc_reg_table_entry   56 drivers/gpu/drm/radeon/ni_dpm.h 	struct ni_mc_reg_entry mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
mc_reg_table_entry 4038 drivers/gpu/drm/radeon/radeon_atombios.c 							reg_table->mc_reg_table_entry[num_ranges].mclk_max =
mc_reg_table_entry 4043 drivers/gpu/drm/radeon/radeon_atombios.c 									reg_table->mc_reg_table_entry[num_ranges].mc_data[i] =
mc_reg_table_entry 4047 drivers/gpu/drm/radeon/radeon_atombios.c 									reg_table->mc_reg_table_entry[num_ranges].mc_data[i] =
mc_reg_table_entry 4048 drivers/gpu/drm/radeon/radeon_atombios.c 										reg_table->mc_reg_table_entry[num_ranges].mc_data[i - 1];
mc_reg_table_entry  667 drivers/gpu/drm/radeon/radeon_mode.h 	struct atom_mc_reg_entry mc_reg_table_entry[VBIOS_MAX_AC_TIMING_ENTRIES];
mc_reg_table_entry 5372 drivers/gpu/drm/radeon/si_dpm.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 5374 drivers/gpu/drm/radeon/si_dpm.c 					((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16);
mc_reg_table_entry 5383 drivers/gpu/drm/radeon/si_dpm.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 5385 drivers/gpu/drm/radeon/si_dpm.c 					(table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
mc_reg_table_entry 5387 drivers/gpu/drm/radeon/si_dpm.c 					table->mc_reg_table_entry[k].mc_data[j] |= 0x100;
mc_reg_table_entry 5397 drivers/gpu/drm/radeon/si_dpm.c 					table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 5398 drivers/gpu/drm/radeon/si_dpm.c 						(table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16;
mc_reg_table_entry 5409 drivers/gpu/drm/radeon/si_dpm.c 				table->mc_reg_table_entry[k].mc_data[j] =
mc_reg_table_entry 5411 drivers/gpu/drm/radeon/si_dpm.c 					(table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
mc_reg_table_entry 5487 drivers/gpu/drm/radeon/si_dpm.c 			if (table->mc_reg_table_entry[j-1].mc_data[i] != table->mc_reg_table_entry[j].mc_data[i]) {
mc_reg_table_entry 5521 drivers/gpu/drm/radeon/si_dpm.c 		si_table->mc_reg_table_entry[i].mclk_max =
mc_reg_table_entry 5522 drivers/gpu/drm/radeon/si_dpm.c 			table->mc_reg_table_entry[i].mclk_max;
mc_reg_table_entry 5524 drivers/gpu/drm/radeon/si_dpm.c 			si_table->mc_reg_table_entry[i].mc_data[j] =
mc_reg_table_entry 5525 drivers/gpu/drm/radeon/si_dpm.c 				table->mc_reg_table_entry[i].mc_data[j];
mc_reg_table_entry 5625 drivers/gpu/drm/radeon/si_dpm.c 		if (pl->mclk <= si_pi->mc_reg_table.mc_reg_table_entry[i].mclk_max)
mc_reg_table_entry 5632 drivers/gpu/drm/radeon/si_dpm.c 	si_convert_mc_registers(&si_pi->mc_reg_table.mc_reg_table_entry[i],
mc_reg_table_entry 5668 drivers/gpu/drm/radeon/si_dpm.c 	si_convert_mc_registers(&si_pi->mc_reg_table.mc_reg_table_entry[0],
mc_reg_table_entry 5677 drivers/gpu/drm/radeon/si_dpm.c 		si_convert_mc_registers(&si_pi->mc_reg_table.mc_reg_table_entry[0],
mc_reg_table_entry  116 drivers/gpu/drm/radeon/si_dpm.h 	struct si_mc_reg_entry mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];