mc_int_base        50 drivers/edac/highbank_mc_edac.c 	void __iomem *mc_int_base;
mc_int_base        60 drivers/edac/highbank_mc_edac.c 	status = readl(drvdata->mc_int_base + HB_DDR_ECC_INT_STATUS);
mc_int_base        82 drivers/edac/highbank_mc_edac.c 	writel(status, drvdata->mc_int_base + HB_DDR_ECC_INT_ACK);
mc_int_base       203 drivers/edac/highbank_mc_edac.c 	drvdata->mc_int_base = base + settings->int_offset;