max_vscl_taps 90 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->acceptable_quality_vta_ps =dcn_bw_min2(v->max_vscl_taps, 2.0 *dcn_bw_ceil2(v->v_ratio[k], 1.0)); max_vscl_taps 155 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c .max_vscl_taps = 8, max_vscl_taps 815 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_vscl_taps = dc->dcn_ip->max_vscl_taps; max_vscl_taps 1695 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->max_vscl_taps, max_vscl_taps 1745 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.max_vscl_taps = dc->dcn_ip->max_vscl_taps; max_vscl_taps 98 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c .max_vscl_taps = 8, max_vscl_taps 142 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c .max_vscl_taps = 8, max_vscl_taps 140 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c .max_vscl_taps = 8, max_vscl_taps 175 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h unsigned int max_vscl_taps; max_vscl_taps 162 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h float max_vscl_taps; max_vscl_taps 611 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h int max_vscl_taps;