max_vblank_count  264 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c 	adev->ddev->max_vblank_count = 0x00ffffff;
max_vblank_count  368 drivers/gpu/drm/amd/amdgpu/dce_virtual.c 	adev->ddev->max_vblank_count = 0;
max_vblank_count  117 drivers/gpu/drm/drm_vblank.c 	return vblank->max_vblank_count ?: dev->max_vblank_count;
max_vblank_count  213 drivers/gpu/drm/drm_vblank.c 	u32 max_vblank_count = drm_max_vblank_count(dev, pipe);
max_vblank_count  232 drivers/gpu/drm/drm_vblank.c 	if (max_vblank_count) {
max_vblank_count  234 drivers/gpu/drm/drm_vblank.c 		diff = (cur_vblank - vblank->last) & max_vblank_count;
max_vblank_count 1242 drivers/gpu/drm/drm_vblank.c 				   u32 max_vblank_count)
max_vblank_count 1248 drivers/gpu/drm/drm_vblank.c 	WARN_ON(dev->max_vblank_count);
max_vblank_count 1251 drivers/gpu/drm/drm_vblank.c 	vblank->max_vblank_count = max_vblank_count;
max_vblank_count  365 drivers/gpu/drm/gma500/psb_drv.c 	dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
max_vblank_count 13721 drivers/gpu/drm/i915/display/intel_display.c 	if (!vblank->max_vblank_count)
max_vblank_count  781 drivers/gpu/drm/i915/i915_irq.c 	if (!vblank->max_vblank_count)
max_vblank_count  769 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c 	dev->max_vblank_count = 0; /* max_vblank_count is set on each CRTC */
max_vblank_count  159 drivers/gpu/drm/radeon/radeon_irq_kms.c 		dev->max_vblank_count = 0x00ffffff;
max_vblank_count  161 drivers/gpu/drm/radeon/radeon_irq_kms.c 		dev->max_vblank_count = 0x001fffff;
max_vblank_count  186 drivers/gpu/drm/tegra/drm.c 	drm->max_vblank_count = 0xffffffff;
max_vblank_count  252 include/drm/drm_device.h 	u32 max_vblank_count;
max_vblank_count  149 include/drm/drm_vblank.h 	u32 max_vblank_count;
max_vblank_count  229 include/drm/drm_vblank.h 				   u32 max_vblank_count);