max_uv             17 drivers/gpu/drm/nouveau/include/nvkm/subdev/volt.h 	u32 max_uv;
max_uv            510 drivers/gpu/drm/nouveau/nouveau_hwmon.c 		*val = volt->max_uv > 0 ? (volt->max_uv / 1000) : -ENODEV;
max_uv            108 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 	return voltage <= min(max_volt, volt->max_uv);
max_uv            125 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 	max_volt = volt->max_uv;
max_uv            237 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 	if (volt && nvkm_volt_map_min(volt, cstepX.voltage) > volt->max_uv)
max_uv             54 drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.c 	int i, ret = -EINVAL, best_err = volt->max_uv, best = -1;
max_uv            199 drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.c 		volt->max_uv = info.max;
max_uv            213 drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.c 		volt->max_uv = 0;
max_uv            222 drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.c 				volt->max_uv = max(volt->max_uv, ivid.voltage);
max_uv            228 drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.c 		volt->max_uv = info.base + info.pwm_range;
max_uv            299 drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.c 			   volt->min_uv, volt->max_uv);
max_uv            146 drivers/mmc/host/dw_mmc-k3.c 	int min_uv, max_uv;
max_uv            159 drivers/mmc/host/dw_mmc-k3.c 		max_uv = 3000000;
max_uv            164 drivers/mmc/host/dw_mmc-k3.c 		max_uv = 1800000;
max_uv            178 drivers/mmc/host/dw_mmc-k3.c 	ret = regulator_set_voltage(mmc->supply.vqmmc, min_uv, max_uv);
max_uv            181 drivers/mmc/host/dw_mmc-k3.c 				 ret, min_uv, max_uv);