max_slices_h       33 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 	int max_slices_h; // Maximum available if 0
max_slices_h       41 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 	.max_slices_h = 0, // DSC Policy: Use max available slices (in our case 4 for or 8, depending on the mode)
max_slices_h      518 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 	int max_slices_h;
max_slices_h      615 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 	max_slices_h = get_max_dsc_slices(dsc_common_caps.slice_caps);
max_slices_h      617 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 	while (max_slices_h > 0) {
max_slices_h      618 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 		if (pic_width % max_slices_h == 0)
max_slices_h      621 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 		max_slices_h = dec_num_slices(dsc_common_caps.slice_caps, max_slices_h);
max_slices_h      634 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 	while (min_slices_h <= max_slices_h) {
max_slices_h      645 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 	is_dsc_possible = (min_slices_h <= max_slices_h);
max_slices_h      652 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 		else if (max_slices_h > 0) { // Fall back to max slices if min slices is not working out
max_slices_h      653 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 			if (dsc_policy.max_slices_h)
max_slices_h      654 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 				num_slices_h = min(dsc_policy.max_slices_h, max_slices_h);
max_slices_h      656 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 				num_slices_h = max_slices_h;
max_slices_h      660 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 		if (max_slices_h > 0) {
max_slices_h      661 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 			if (dsc_policy.max_slices_h)
max_slices_h      662 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 				num_slices_h = min(dsc_policy.max_slices_h, max_slices_h);
max_slices_h      664 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 				num_slices_h = max_slices_h;