max_ref_divider 254 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c uint32_t max_ref_divider, max_ref_divider 276 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c ref_divider <= max_ref_divider; max_ref_divider 300 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c uint32_t max_ref_divider; max_ref_divider 339 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c max_ref_divider = pll_settings->reference_divider; max_ref_divider 348 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c max_ref_divider = ((calc_pll_cs->ref_freq_khz max_ref_divider 369 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c if (min_ref_divider > max_ref_divider) { max_ref_divider 384 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c max_ref_divider,