max_ref_div       607 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 		ppll->max_ref_div = 0x3ff;
max_ref_div       637 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 		spll->max_ref_div = 0xff;
max_ref_div       669 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 		mpll->max_ref_div = 0xff;
max_ref_div       390 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c 		spll->max_ref_div = 0xff;
max_ref_div       413 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c 		mpll->max_ref_div = 0xff;
max_ref_div       209 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 	uint32_t max_ref_div;
max_ref_div       150 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c 		ref_div_max = pll->max_ref_div;
max_ref_div       304 drivers/gpu/drm/radeon/radeon_clocks.c 	dcpll->max_ref_div = 0x3ff;
max_ref_div       310 drivers/gpu/drm/radeon/radeon_clocks.c 	p1pll->max_ref_div = 0x3ff;
max_ref_div       316 drivers/gpu/drm/radeon/radeon_clocks.c 	p2pll->max_ref_div = 0x3ff;
max_ref_div       325 drivers/gpu/drm/radeon/radeon_clocks.c 	spll->max_ref_div = 0xff;
max_ref_div       334 drivers/gpu/drm/radeon/radeon_clocks.c 	mpll->max_ref_div = 0xff;
max_ref_div       992 drivers/gpu/drm/radeon/radeon_display.c 		ref_div_max = min(pll->max_ref_div, 7u);
max_ref_div       994 drivers/gpu/drm/radeon/radeon_display.c 		ref_div_max = pll->max_ref_div;
max_ref_div      1117 drivers/gpu/drm/radeon/radeon_display.c 	uint32_t max_ref_div = pll->max_ref_div;
max_ref_div      1133 drivers/gpu/drm/radeon/radeon_display.c 	DRM_DEBUG_KMS("PLL freq %llu %u %u\n", freq, pll->min_ref_div, pll->max_ref_div);
max_ref_div      1148 drivers/gpu/drm/radeon/radeon_display.c 		min_ref_div = max_ref_div = pll->reference_div;
max_ref_div      1150 drivers/gpu/drm/radeon/radeon_display.c 		while (min_ref_div < max_ref_div-1) {
max_ref_div      1151 drivers/gpu/drm/radeon/radeon_display.c 			uint32_t mid = (min_ref_div + max_ref_div) / 2;
max_ref_div      1154 drivers/gpu/drm/radeon/radeon_display.c 				max_ref_div = mid;
max_ref_div      1189 drivers/gpu/drm/radeon/radeon_display.c 		for (ref_div = min_ref_div; ref_div <= max_ref_div; ++ref_div) {
max_ref_div       184 drivers/gpu/drm/radeon/radeon_mode.h 	uint32_t max_ref_div;