max_post_div      603 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 		ppll->max_post_div = 0x7f;
max_post_div      635 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 		spll->max_post_div = 1;
max_post_div      667 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 		mpll->max_post_div = 1;
max_post_div      388 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c 		spll->max_post_div = 1;
max_post_div      411 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c 		mpll->max_post_div = 1;
max_post_div      211 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 	uint32_t max_post_div;
max_post_div      181 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c 		if (post_div_max > pll->max_post_div)
max_post_div      182 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c 			post_div_max = pll->max_post_div;
max_post_div      280 drivers/gpu/drm/radeon/radeon_clocks.c 		p1pll->max_post_div = 0x7f;
max_post_div      284 drivers/gpu/drm/radeon/radeon_clocks.c 		p2pll->max_post_div = 0x7f;
max_post_div      289 drivers/gpu/drm/radeon/radeon_clocks.c 		p1pll->max_post_div = 16;
max_post_div      293 drivers/gpu/drm/radeon/radeon_clocks.c 		p2pll->max_post_div = 12;
max_post_div      300 drivers/gpu/drm/radeon/radeon_clocks.c 	dcpll->max_post_div = 0x7f;
max_post_div      323 drivers/gpu/drm/radeon/radeon_clocks.c 	spll->max_post_div = 1;
max_post_div      332 drivers/gpu/drm/radeon/radeon_clocks.c 	mpll->max_post_div = 1;
max_post_div     1025 drivers/gpu/drm/radeon/radeon_display.c 		if (post_div_max > pll->max_post_div)
max_post_div     1026 drivers/gpu/drm/radeon/radeon_display.c 			post_div_max = pll->max_post_div;
max_post_div     1119 drivers/gpu/drm/radeon/radeon_display.c 	uint32_t max_post_div = pll->max_post_div;
max_post_div     1163 drivers/gpu/drm/radeon/radeon_display.c 		min_post_div = max_post_div = pll->post_div;
max_post_div     1170 drivers/gpu/drm/radeon/radeon_display.c 	for (post_div = max_post_div; post_div >= min_post_div; --post_div) {
max_post_div      186 drivers/gpu/drm/radeon/radeon_mode.h 	uint32_t max_post_div;