MPC_OCSC_MODE     138 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 	REG_SET(CSC_MODE[opp_id], 0, MPC_OCSC_MODE, ocsc_mode);
MPC_OCSC_MODE     177 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 	REG_SET(CSC_MODE[opp_id], 0, MPC_OCSC_MODE, ocsc_mode);
MPC_OCSC_MODE     137 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.h 	SF(MPC_OUT0_CSC_MODE, MPC_OCSC_MODE, mask_sh),\
MPC_OCSC_MODE     185 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.h 	type MPC_OCSC_MODE;\