max_planes 2276 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for (i = 0; i < dm->dc->caps.max_planes; ++i) { max_planes 99 drivers/gpu/drm/amd/display/dc/dc.h uint32_t max_planes; max_planes 1063 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c dc->caps.max_planes = pool->base.pipe_count; max_planes 1065 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c for (i = 0; i < dc->caps.max_planes; ++i) max_planes 1434 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c dc->caps.max_planes = pool->base.pipe_count; max_planes 1314 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c dc->caps.max_planes = pool->base.pipe_count; max_planes 1316 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c for (i = 0; i < dc->caps.max_planes; ++i) max_planes 1178 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c dc->caps.max_planes = pool->base.pipe_count; max_planes 1180 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c for (i = 0; i < dc->caps.max_planes; ++i) max_planes 1032 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c dc->caps.max_planes = pool->base.pipe_count; max_planes 1034 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c for (i = 0; i < dc->caps.max_planes; ++i) max_planes 1229 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c dc->caps.max_planes = pool->base.pipe_count; max_planes 1231 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c for (i = 0; i < dc->caps.max_planes; ++i) max_planes 1422 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c dc->caps.max_planes = pool->base.pipe_count; max_planes 1424 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c for (i = 0; i < dc->caps.max_planes; ++i) max_planes 1545 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c dc->caps.max_planes = pool->base.pipe_count; max_planes 1547 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c for (i = 0; i < dc->caps.max_planes; ++i) max_planes 3726 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c dc->caps.max_planes = pool->base.pipe_count; max_planes 3728 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c for (i = 0; i < dc->caps.max_planes; ++i) max_planes 1656 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c dc->caps.max_planes = pool->base.pipe_count; max_planes 1658 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c for (i = 0; i < dc->caps.max_planes; ++i) max_planes 269 drivers/gpu/drm/omapdrm/omap_irq.c unsigned int max_planes; max_planes 278 drivers/gpu/drm/omapdrm/omap_irq.c max_planes = min(ARRAY_SIZE(priv->planes), max_planes 280 drivers/gpu/drm/omapdrm/omap_irq.c for (i = 0; i < max_planes; ++i) {