MPCC_OGAM_RAMB_END_CNTL2_B  301 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 	gam_regs.start_end_cntl2_b = REG(MPCC_OGAM_RAMB_END_CNTL2_B[mpcc_id]);
MPCC_OGAM_RAMB_END_CNTL2_B   59 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.h 	SRII(MPCC_OGAM_RAMB_END_CNTL2_B, MPCC_OGAM, inst),\
MPCC_OGAM_RAMB_END_CNTL2_B  109 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.h 	uint32_t MPCC_OGAM_RAMB_END_CNTL2_B[MAX_MPCC]; \