max_mul           903 arch/x86/kvm/hyperv.c 	u64 max_mul;
max_mul           914 arch/x86/kvm/hyperv.c 	max_mul = 100ull << (32 - hv_clock->tsc_shift);
max_mul           915 arch/x86/kvm/hyperv.c 	if (hv_clock->tsc_to_system_mul >= max_mul)
max_mul            25 drivers/clk/actions/owl-pll.c 	else if (mul > pll_hw->max_mul)
max_mul            26 drivers/clk/actions/owl-pll.c 		mul = pll_hw->max_mul;
max_mul            31 drivers/clk/actions/owl-pll.h 	u8			max_mul;
max_mul            50 drivers/clk/actions/owl-pll.h 		.max_mul	= _max_mul,				\
max_mul           257 drivers/net/ethernet/mellanox/mlx4/en_clock.c 	u64 max_mul = div64_u64(ULLONG_MAX, max_val_cycles_rounded);
max_mul           260 drivers/net/ethernet/mellanox/mlx4/en_clock.c 	return ilog2(div_u64(max_mul * freq_khz, 1000000));