MPCC_OGAM_RAMA_REGION_32_33  334 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 	gam_regs.region_end = REG(MPCC_OGAM_RAMA_REGION_32_33[mpcc_id]);
MPCC_OGAM_RAMA_REGION_32_33   51 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.h 	SRII(MPCC_OGAM_RAMA_REGION_32_33, MPCC_OGAM, inst),\
MPCC_OGAM_RAMA_REGION_32_33  101 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.h 	uint32_t MPCC_OGAM_RAMA_REGION_32_33[MAX_MPCC]; \