max_limits 2217 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_clock_and_voltage_limits *max_limits = max_limits 2228 drivers/gpu/drm/amd/amdgpu/kv_dpm.c mclk = max_limits->mclk; max_limits 2232 drivers/gpu/drm/amd/amdgpu/kv_dpm.c stable_p_state_sclk = (max_limits->sclk * 75) / 100; max_limits 2351 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_clock_and_voltage_limits *max_limits = max_limits 2353 drivers/gpu/drm/amd/amdgpu/kv_dpm.c u32 mclk = max_limits->mclk; max_limits 3288 drivers/gpu/drm/amd/amdgpu/si_dpm.c const struct amdgpu_clock_and_voltage_limits *max_limits, max_limits 3301 drivers/gpu/drm/amd/amdgpu/si_dpm.c max_limits->sclk, max_limits 3308 drivers/gpu/drm/amd/amdgpu/si_dpm.c max_limits->mclk, max_limits 3431 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_clock_and_voltage_limits *max_limits; max_limits 3486 drivers/gpu/drm/amd/amdgpu/si_dpm.c max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; max_limits 3488 drivers/gpu/drm/amd/amdgpu/si_dpm.c max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; max_limits 3496 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ps->performance_levels[i].mclk > max_limits->mclk) max_limits 3497 drivers/gpu/drm/amd/amdgpu/si_dpm.c ps->performance_levels[i].mclk = max_limits->mclk; max_limits 3498 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ps->performance_levels[i].sclk > max_limits->sclk) max_limits 3499 drivers/gpu/drm/amd/amdgpu/si_dpm.c ps->performance_levels[i].sclk = max_limits->sclk; max_limits 3500 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ps->performance_levels[i].vddc > max_limits->vddc) max_limits 3501 drivers/gpu/drm/amd/amdgpu/si_dpm.c ps->performance_levels[i].vddc = max_limits->vddc; max_limits 3502 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ps->performance_levels[i].vddci > max_limits->vddci) max_limits 3503 drivers/gpu/drm/amd/amdgpu/si_dpm.c ps->performance_levels[i].vddci = max_limits->vddci; max_limits 3608 drivers/gpu/drm/amd/amdgpu/si_dpm.c btc_adjust_clock_combinations(adev, max_limits, max_limits 3616 drivers/gpu/drm/amd/amdgpu/si_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); max_limits 3619 drivers/gpu/drm/amd/amdgpu/si_dpm.c max_limits->vddci, &ps->performance_levels[i].vddci); max_limits 3622 drivers/gpu/drm/amd/amdgpu/si_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); max_limits 3625 drivers/gpu/drm/amd/amdgpu/si_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); max_limits 3630 drivers/gpu/drm/amd/amdgpu/si_dpm.c max_limits->vddc, max_limits->vddci, max_limits 2895 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c const struct phm_clock_and_voltage_limits *max_limits; max_limits 2910 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c max_limits = adev->pm.ac_power ? max_limits 2917 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (smu7_ps->performance_levels[i].memory_clock > max_limits->mclk) max_limits 2918 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c smu7_ps->performance_levels[i].memory_clock = max_limits->mclk; max_limits 2919 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (smu7_ps->performance_levels[i].engine_clock > max_limits->sclk) max_limits 2920 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c smu7_ps->performance_levels[i].engine_clock = max_limits->sclk; max_limits 2929 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); max_limits 2930 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c stable_pstate_sclk = (max_limits->sclk * 75) / 100; max_limits 2945 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c stable_pstate_mclk = max_limits->mclk; max_limits 2972 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c sclk = (minimum_clocks.engineClock > max_limits->sclk) ? max_limits 2973 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c max_limits->sclk : minimum_clocks.engineClock; max_limits 2976 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c mclk = (minimum_clocks.memoryClock > max_limits->mclk) ? max_limits 2977 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c max_limits->mclk : minimum_clocks.memoryClock; max_limits 3144 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c const struct phm_clock_and_voltage_limits *max_limits; max_limits 3160 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c max_limits = adev->pm.ac_power ? max_limits 3168 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c max_limits->mclk) max_limits 3170 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c max_limits->mclk; max_limits 3172 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c max_limits->sclk) max_limits 3174 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c max_limits->sclk; max_limits 3191 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); max_limits 3192 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c stable_pstate_sclk = (max_limits->sclk * max_limits 3208 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c stable_pstate_mclk = max_limits->mclk; max_limits 3233 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c sclk = (minimum_clocks.engineClock > max_limits->sclk) ? max_limits 3234 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c max_limits->sclk : minimum_clocks.engineClock; max_limits 3237 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c mclk = (minimum_clocks.memoryClock > max_limits->mclk) ? max_limits 3238 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c max_limits->mclk : minimum_clocks.memoryClock; max_limits 4199 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct phm_clock_and_voltage_limits *max_limits = max_limits 4202 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c info->engine_max_clock = max_limits->sclk; max_limits 4203 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c info->memory_max_clock = max_limits->mclk; max_limits 1686 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c struct phm_clock_and_voltage_limits *max_limits = max_limits 1689 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c info->engine_max_clock = max_limits->sclk; max_limits 1690 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c info->memory_max_clock = max_limits->mclk; max_limits 2744 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c struct phm_clock_and_voltage_limits *max_limits = max_limits 2747 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c info->engine_max_clock = max_limits->sclk; max_limits 2748 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c info->memory_max_clock = max_limits->mclk; max_limits 1271 drivers/gpu/drm/radeon/btc_dpm.c const struct radeon_clock_and_voltage_limits *max_limits, max_limits 1284 drivers/gpu/drm/radeon/btc_dpm.c max_limits->sclk, max_limits 1291 drivers/gpu/drm/radeon/btc_dpm.c max_limits->mclk, max_limits 2100 drivers/gpu/drm/radeon/btc_dpm.c struct radeon_clock_and_voltage_limits *max_limits; max_limits 2112 drivers/gpu/drm/radeon/btc_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; max_limits 2114 drivers/gpu/drm/radeon/btc_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; max_limits 2117 drivers/gpu/drm/radeon/btc_dpm.c if (ps->high.mclk > max_limits->mclk) max_limits 2118 drivers/gpu/drm/radeon/btc_dpm.c ps->high.mclk = max_limits->mclk; max_limits 2119 drivers/gpu/drm/radeon/btc_dpm.c if (ps->high.sclk > max_limits->sclk) max_limits 2120 drivers/gpu/drm/radeon/btc_dpm.c ps->high.sclk = max_limits->sclk; max_limits 2121 drivers/gpu/drm/radeon/btc_dpm.c if (ps->high.vddc > max_limits->vddc) max_limits 2122 drivers/gpu/drm/radeon/btc_dpm.c ps->high.vddc = max_limits->vddc; max_limits 2123 drivers/gpu/drm/radeon/btc_dpm.c if (ps->high.vddci > max_limits->vddci) max_limits 2124 drivers/gpu/drm/radeon/btc_dpm.c ps->high.vddci = max_limits->vddci; max_limits 2126 drivers/gpu/drm/radeon/btc_dpm.c if (ps->medium.mclk > max_limits->mclk) max_limits 2127 drivers/gpu/drm/radeon/btc_dpm.c ps->medium.mclk = max_limits->mclk; max_limits 2128 drivers/gpu/drm/radeon/btc_dpm.c if (ps->medium.sclk > max_limits->sclk) max_limits 2129 drivers/gpu/drm/radeon/btc_dpm.c ps->medium.sclk = max_limits->sclk; max_limits 2130 drivers/gpu/drm/radeon/btc_dpm.c if (ps->medium.vddc > max_limits->vddc) max_limits 2131 drivers/gpu/drm/radeon/btc_dpm.c ps->medium.vddc = max_limits->vddc; max_limits 2132 drivers/gpu/drm/radeon/btc_dpm.c if (ps->medium.vddci > max_limits->vddci) max_limits 2133 drivers/gpu/drm/radeon/btc_dpm.c ps->medium.vddci = max_limits->vddci; max_limits 2135 drivers/gpu/drm/radeon/btc_dpm.c if (ps->low.mclk > max_limits->mclk) max_limits 2136 drivers/gpu/drm/radeon/btc_dpm.c ps->low.mclk = max_limits->mclk; max_limits 2137 drivers/gpu/drm/radeon/btc_dpm.c if (ps->low.sclk > max_limits->sclk) max_limits 2138 drivers/gpu/drm/radeon/btc_dpm.c ps->low.sclk = max_limits->sclk; max_limits 2139 drivers/gpu/drm/radeon/btc_dpm.c if (ps->low.vddc > max_limits->vddc) max_limits 2140 drivers/gpu/drm/radeon/btc_dpm.c ps->low.vddc = max_limits->vddc; max_limits 2141 drivers/gpu/drm/radeon/btc_dpm.c if (ps->low.vddci > max_limits->vddci) max_limits 2142 drivers/gpu/drm/radeon/btc_dpm.c ps->low.vddci = max_limits->vddci; max_limits 2165 drivers/gpu/drm/radeon/btc_dpm.c btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, max_limits 2201 drivers/gpu/drm/radeon/btc_dpm.c btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, max_limits 2203 drivers/gpu/drm/radeon/btc_dpm.c btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, max_limits 2206 drivers/gpu/drm/radeon/btc_dpm.c btc_adjust_clock_combinations(rdev, max_limits, &ps->low); max_limits 2207 drivers/gpu/drm/radeon/btc_dpm.c btc_adjust_clock_combinations(rdev, max_limits, &ps->medium); max_limits 2208 drivers/gpu/drm/radeon/btc_dpm.c btc_adjust_clock_combinations(rdev, max_limits, &ps->high); max_limits 2211 drivers/gpu/drm/radeon/btc_dpm.c ps->low.sclk, max_limits->vddc, &ps->low.vddc); max_limits 2213 drivers/gpu/drm/radeon/btc_dpm.c ps->low.mclk, max_limits->vddci, &ps->low.vddci); max_limits 2215 drivers/gpu/drm/radeon/btc_dpm.c ps->low.mclk, max_limits->vddc, &ps->low.vddc); max_limits 2217 drivers/gpu/drm/radeon/btc_dpm.c rdev->clock.current_dispclk, max_limits->vddc, &ps->low.vddc); max_limits 2220 drivers/gpu/drm/radeon/btc_dpm.c ps->medium.sclk, max_limits->vddc, &ps->medium.vddc); max_limits 2222 drivers/gpu/drm/radeon/btc_dpm.c ps->medium.mclk, max_limits->vddci, &ps->medium.vddci); max_limits 2224 drivers/gpu/drm/radeon/btc_dpm.c ps->medium.mclk, max_limits->vddc, &ps->medium.vddc); max_limits 2226 drivers/gpu/drm/radeon/btc_dpm.c rdev->clock.current_dispclk, max_limits->vddc, &ps->medium.vddc); max_limits 2229 drivers/gpu/drm/radeon/btc_dpm.c ps->high.sclk, max_limits->vddc, &ps->high.vddc); max_limits 2231 drivers/gpu/drm/radeon/btc_dpm.c ps->high.mclk, max_limits->vddci, &ps->high.vddci); max_limits 2233 drivers/gpu/drm/radeon/btc_dpm.c ps->high.mclk, max_limits->vddc, &ps->high.vddc); max_limits 2235 drivers/gpu/drm/radeon/btc_dpm.c rdev->clock.current_dispclk, max_limits->vddc, &ps->high.vddc); max_limits 2237 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_delta_rules(rdev, max_limits->vddc, max_limits->vddci, max_limits 2239 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_delta_rules(rdev, max_limits->vddc, max_limits->vddci, max_limits 2241 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_delta_rules(rdev, max_limits->vddc, max_limits->vddci, max_limits 48 drivers/gpu/drm/radeon/btc_dpm.h const struct radeon_clock_and_voltage_limits *max_limits, max_limits 800 drivers/gpu/drm/radeon/ci_dpm.c struct radeon_clock_and_voltage_limits *max_limits; max_limits 825 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; max_limits 827 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; max_limits 831 drivers/gpu/drm/radeon/ci_dpm.c if (ps->performance_levels[i].mclk > max_limits->mclk) max_limits 832 drivers/gpu/drm/radeon/ci_dpm.c ps->performance_levels[i].mclk = max_limits->mclk; max_limits 833 drivers/gpu/drm/radeon/ci_dpm.c if (ps->performance_levels[i].sclk > max_limits->sclk) max_limits 834 drivers/gpu/drm/radeon/ci_dpm.c ps->performance_levels[i].sclk = max_limits->sclk; max_limits 3934 drivers/gpu/drm/radeon/ci_dpm.c const struct radeon_clock_and_voltage_limits *max_limits; max_limits 3938 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; max_limits 3940 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; max_limits 3946 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) { max_limits 3983 drivers/gpu/drm/radeon/ci_dpm.c const struct radeon_clock_and_voltage_limits *max_limits; max_limits 3987 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; max_limits 3989 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; max_limits 3994 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) { max_limits 4016 drivers/gpu/drm/radeon/ci_dpm.c const struct radeon_clock_and_voltage_limits *max_limits; max_limits 4020 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; max_limits 4022 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; max_limits 4027 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) { max_limits 4047 drivers/gpu/drm/radeon/ci_dpm.c const struct radeon_clock_and_voltage_limits *max_limits; max_limits 4051 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; max_limits 4053 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; max_limits 4058 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) { max_limits 2152 drivers/gpu/drm/radeon/kv_dpm.c struct radeon_clock_and_voltage_limits *max_limits = max_limits 2163 drivers/gpu/drm/radeon/kv_dpm.c mclk = max_limits->mclk; max_limits 2167 drivers/gpu/drm/radeon/kv_dpm.c stable_p_state_sclk = (max_limits->sclk * 75) / 100; max_limits 2286 drivers/gpu/drm/radeon/kv_dpm.c struct radeon_clock_and_voltage_limits *max_limits = max_limits 2288 drivers/gpu/drm/radeon/kv_dpm.c u32 mclk = max_limits->mclk; max_limits 791 drivers/gpu/drm/radeon/ni_dpm.c struct radeon_clock_and_voltage_limits *max_limits; max_limits 804 drivers/gpu/drm/radeon/ni_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; max_limits 806 drivers/gpu/drm/radeon/ni_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; max_limits 810 drivers/gpu/drm/radeon/ni_dpm.c if (ps->performance_levels[i].mclk > max_limits->mclk) max_limits 811 drivers/gpu/drm/radeon/ni_dpm.c ps->performance_levels[i].mclk = max_limits->mclk; max_limits 812 drivers/gpu/drm/radeon/ni_dpm.c if (ps->performance_levels[i].sclk > max_limits->sclk) max_limits 813 drivers/gpu/drm/radeon/ni_dpm.c ps->performance_levels[i].sclk = max_limits->sclk; max_limits 814 drivers/gpu/drm/radeon/ni_dpm.c if (ps->performance_levels[i].vddc > max_limits->vddc) max_limits 815 drivers/gpu/drm/radeon/ni_dpm.c ps->performance_levels[i].vddc = max_limits->vddc; max_limits 816 drivers/gpu/drm/radeon/ni_dpm.c if (ps->performance_levels[i].vddci > max_limits->vddci) max_limits 817 drivers/gpu/drm/radeon/ni_dpm.c ps->performance_levels[i].vddci = max_limits->vddci; max_limits 831 drivers/gpu/drm/radeon/ni_dpm.c btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, max_limits 866 drivers/gpu/drm/radeon/ni_dpm.c btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, max_limits 871 drivers/gpu/drm/radeon/ni_dpm.c btc_adjust_clock_combinations(rdev, max_limits, max_limits 877 drivers/gpu/drm/radeon/ni_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); max_limits 880 drivers/gpu/drm/radeon/ni_dpm.c max_limits->vddci, &ps->performance_levels[i].vddci); max_limits 883 drivers/gpu/drm/radeon/ni_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); max_limits 886 drivers/gpu/drm/radeon/ni_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); max_limits 891 drivers/gpu/drm/radeon/ni_dpm.c max_limits->vddc, max_limits->vddci, max_limits 2972 drivers/gpu/drm/radeon/si_dpm.c struct radeon_clock_and_voltage_limits *max_limits; max_limits 3027 drivers/gpu/drm/radeon/si_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; max_limits 3029 drivers/gpu/drm/radeon/si_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; max_limits 3037 drivers/gpu/drm/radeon/si_dpm.c if (ps->performance_levels[i].mclk > max_limits->mclk) max_limits 3038 drivers/gpu/drm/radeon/si_dpm.c ps->performance_levels[i].mclk = max_limits->mclk; max_limits 3039 drivers/gpu/drm/radeon/si_dpm.c if (ps->performance_levels[i].sclk > max_limits->sclk) max_limits 3040 drivers/gpu/drm/radeon/si_dpm.c ps->performance_levels[i].sclk = max_limits->sclk; max_limits 3041 drivers/gpu/drm/radeon/si_dpm.c if (ps->performance_levels[i].vddc > max_limits->vddc) max_limits 3042 drivers/gpu/drm/radeon/si_dpm.c ps->performance_levels[i].vddc = max_limits->vddc; max_limits 3043 drivers/gpu/drm/radeon/si_dpm.c if (ps->performance_levels[i].vddci > max_limits->vddci) max_limits 3044 drivers/gpu/drm/radeon/si_dpm.c ps->performance_levels[i].vddci = max_limits->vddci; max_limits 3149 drivers/gpu/drm/radeon/si_dpm.c btc_adjust_clock_combinations(rdev, max_limits, max_limits 3157 drivers/gpu/drm/radeon/si_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); max_limits 3160 drivers/gpu/drm/radeon/si_dpm.c max_limits->vddci, &ps->performance_levels[i].vddci); max_limits 3163 drivers/gpu/drm/radeon/si_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); max_limits 3166 drivers/gpu/drm/radeon/si_dpm.c max_limits->vddc, &ps->performance_levels[i].vddc); max_limits 3171 drivers/gpu/drm/radeon/si_dpm.c max_limits->vddc, max_limits->vddci,