MPCC_BOT_SEL 209 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, insert_above_mpcc->mpcc_id); MPCC_BOT_SEL 213 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf); MPCC_BOT_SEL 231 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c REG_SET(MPCC_BOT_SEL[temp_mpcc->mpcc_id], 0, MPCC_BOT_SEL, mpcc_id); MPCC_BOT_SEL 297 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c REG_SET(MPCC_BOT_SEL[temp_mpcc->mpcc_id], 0, MPCC_BOT_SEL 298 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c MPCC_BOT_SEL, mpcc_to_remove->mpcc_bot->mpcc_id); MPCC_BOT_SEL 301 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c REG_SET(MPCC_BOT_SEL[temp_mpcc->mpcc_id], 0, MPCC_BOT_SEL 302 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c MPCC_BOT_SEL, 0xf); MPCC_BOT_SEL 312 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf); MPCC_BOT_SEL 322 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf); MPCC_BOT_SEL 355 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf); MPCC_BOT_SEL 375 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf); MPCC_BOT_SEL 404 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c REG_GET(MPCC_BOT_SEL[mpcc_id], MPCC_BOT_SEL, &bot_sel); MPCC_BOT_SEL 440 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c REG_GET(MPCC_BOT_SEL[mpcc_inst], MPCC_BOT_SEL, &s->bot_mpcc_id); MPCC_BOT_SEL 35 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h SRII(MPCC_BOT_SEL, MPCC, inst),\ MPCC_BOT_SEL 50 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h uint32_t MPCC_BOT_SEL[MAX_MPCC]; \ MPCC_BOT_SEL 62 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h SF(MPCC0_MPCC_BOT_SEL, MPCC_BOT_SEL, mask_sh),\ MPCC_BOT_SEL 85 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h type MPCC_BOT_SEL;\