MPCC_BG_B_CB       58 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c 	REG_SET(MPCC_BG_B_CB[mpcc_id], 0,
MPCC_BG_B_CB       59 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c 			MPCC_BG_B_CB, bg_b_cb);
MPCC_BG_B_CB       41 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h 	SRII(MPCC_BG_B_CB, MPCC, inst),\
MPCC_BG_B_CB       42 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h 	SRII(MPCC_BG_B_CB, MPCC, inst),\
MPCC_BG_B_CB       56 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h 	uint32_t MPCC_BG_B_CB[MAX_MPCC]; \
MPCC_BG_B_CB       74 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h 	SF(MPCC0_MPCC_BG_B_CB, MPCC_BG_B_CB, mask_sh),\
MPCC_BG_B_CB       97 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h 	type MPCC_BG_B_CB;\