MPCC0_MPCC_MEM_PWR_CTRL 161 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.h SF(MPCC0_MPCC_MEM_PWR_CTRL, MPCC_OGAM_MEM_PWR_FORCE, mask_sh),\ MPCC0_MPCC_MEM_PWR_CTRL 162 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.h SF(MPCC0_MPCC_MEM_PWR_CTRL, MPCC_OGAM_MEM_PWR_DIS, mask_sh),\