max_dispclk 451 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->min_dispclk_using_single_dpp <=dcn_bw_min2(v->max_dispclk[i], (j + 1) * v->max_dppclk[i]) && v->number_of_dpp_required_for_det_and_lb_size[k] <= 1.0) { max_dispclk 455 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->min_dispclk_using_dual_dpp <=dcn_bw_min2(v->max_dispclk[i], (j + 1) * v->max_dppclk[i])) { max_dispclk 480 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->min_dispclk_using_single_dpp >dcn_bw_min2(v->max_dispclk[i], (j + 1) * v->max_dppclk[i])) { max_dispclk 487 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->min_dispclk_using_dual_dpp >dcn_bw_min2(v->max_dispclk[i], (j + 1) * v->max_dppclk[i])) { max_dispclk 1214 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->dispclk_without_ramping > v->max_dispclk[number_of_states]) { max_dispclk 1217 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->dispclk_with_ramping > v->max_dispclk[number_of_states]) { max_dispclk 1218 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk = v->max_dispclk[number_of_states]; max_dispclk 676 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk[0] = v->max_dppclk_vmin0p65; max_dispclk 843 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk[5] = v->max_dispclk_vmax0p9; max_dispclk 844 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk[4] = v->max_dispclk_vmax0p9; max_dispclk 845 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk[3] = v->max_dispclk_vmax0p9; max_dispclk 846 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk[2] = v->max_dispclk_vnom0p8; max_dispclk 847 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk[1] = v->max_dispclk_vmid0p72; max_dispclk 848 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->max_dispclk[0] = v->max_dispclk_vmin0p65; max_dispclk 104 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h float max_dispclk[number_of_states_plus_one + 1];