max_data_lanes    302 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c 	if (device->lanes > dsi->plat_data->max_data_lanes) {
max_data_lanes    209 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 	unsigned int max_data_lanes;
max_data_lanes    958 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 	dsi->pdata.max_data_lanes = dsi->cdata->max_data_lanes;
max_data_lanes    999 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 		.max_data_lanes = 4,
max_data_lanes   1007 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 		.max_data_lanes = 4,
max_data_lanes   1027 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 		.max_data_lanes = 4,
max_data_lanes   1053 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 		.max_data_lanes = 4,
max_data_lanes    317 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c 	.max_data_lanes = 2,
max_data_lanes     33 drivers/staging/media/omap4iss/iss_csiphy.c 	for (i = 0; i < phy->max_data_lanes; i++) {
max_data_lanes    174 drivers/staging/media/omap4iss/iss_csiphy.c 	for (i = 0; i < csi2->phy->max_data_lanes; i++) {
max_data_lanes    179 drivers/staging/media/omap4iss/iss_csiphy.c 		    lanes->data[i].pos > (csi2->phy->max_data_lanes + 1))
max_data_lanes    190 drivers/staging/media/omap4iss/iss_csiphy.c 	    lanes->clk.pos > (csi2->phy->max_data_lanes + 1))
max_data_lanes    262 drivers/staging/media/omap4iss/iss_csiphy.c 	phy1->max_data_lanes = ISS_CSIPHY1_NUM_DATA_LANES;
max_data_lanes    270 drivers/staging/media/omap4iss/iss_csiphy.c 	phy2->max_data_lanes = ISS_CSIPHY2_NUM_DATA_LANES;
max_data_lanes     35 drivers/staging/media/omap4iss/iss_csiphy.h 	u8 max_data_lanes;	/* number of CSI2 Data Lanes supported */
max_data_lanes     41 include/drm/bridge/dw_mipi_dsi.h 	unsigned int max_data_lanes;