max_clks_by_state  209 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 				clk_mgr_dce->max_clks_by_state[i].display_clk_khz
max_clks_by_state  211 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 				clk_mgr_dce->max_clks_by_state[i].pixel_clk_khz)
max_clks_by_state  217 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 		if (clk_mgr_dce->max_clks_by_state[clk_mgr_dce->max_clks_state].display_clk_khz
max_clks_by_state  316 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 				clk_mgr_dce->max_clks_by_state[clk_state].display_clk_khz =
max_clks_by_state  441 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 	memcpy(clk_mgr->max_clks_by_state,
max_clks_by_state  286 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c 	memcpy(clk_mgr->max_clks_by_state,
max_clks_by_state  231 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c 	memcpy(clk_mgr->max_clks_by_state,
max_clks_by_state  132 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c 	memcpy(clk_mgr->max_clks_by_state,
max_clks_by_state  228 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 				clk_mgr_dce->max_clks_by_state[i].display_clk_khz
max_clks_by_state  230 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 				clk_mgr_dce->max_clks_by_state[i].pixel_clk_khz)
max_clks_by_state  236 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 		if (clk_mgr_dce->max_clks_by_state[clk_mgr_dce->max_clks_state].display_clk_khz
max_clks_by_state  390 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 			clk_mgr_dce->max_clks_by_state[clk_state].display_clk_khz =
max_clks_by_state  854 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	memcpy(clk_mgr_dce->max_clks_by_state,
max_clks_by_state  877 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	memcpy(clk_mgr_dce->max_clks_by_state,
max_clks_by_state  902 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	memcpy(clk_mgr_dce->max_clks_by_state,
max_clks_by_state  923 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	memcpy(clk_mgr_dce->max_clks_by_state,
max_clks_by_state  946 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	memcpy(clk_mgr_dce->max_clks_by_state, dce120_max_clks_by_state,
max_clks_by_state  210 drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h 	struct state_dependent_clocks max_clks_by_state[DM_PP_CLOCKS_MAX_STATES];