mask_set           40 arch/sparc/kernel/irq.h 	u32	mask_set;
mask_set          204 arch/sparc/kernel/sun4m_irq.c 			sbus_writel(handler_data->mask, &sun4m_irq_global->mask_set);
mask_set          414 arch/sparc/kernel/sun4m_irq.c 		sbus_writel(SUN4M_INT_E14, &sun4m_irq_global->mask_set);
mask_set          464 arch/sparc/kernel/sun4m_irq.c 	sbus_writel(~SUN4M_INT_MASKALL, &sun4m_irq_global->mask_set);
mask_set           38 arch/x86/mm/pageattr.c 	pgprot_t	mask_set;
mask_set          799 arch/x86/mm/pageattr.c 	pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
mask_set         1427 arch/x86/mm/pageattr.c 	pgprot_val(pgprot) |=  pgprot_val(cpa->mask_set);
mask_set         1513 arch/x86/mm/pageattr.c 		pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
mask_set         1669 arch/x86/mm/pageattr.c 				    pgprot_t mask_set, pgprot_t mask_clr,
mask_set         1682 arch/x86/mm/pageattr.c 	mask_set = canon_pgprot(mask_set);
mask_set         1684 arch/x86/mm/pageattr.c 	if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
mask_set         1718 arch/x86/mm/pageattr.c 	cpa.mask_set = mask_set;
mask_set         1728 arch/x86/mm/pageattr.c 	checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
mask_set         1745 arch/x86/mm/pageattr.c 	cache = !!pgprot2cachemode(mask_set);
mask_set         1959 arch/x86/mm/pageattr.c 	cpa.mask_set = enc ? __pgprot(_PAGE_ENC) : __pgprot(0);
mask_set         2123 arch/x86/mm/pageattr.c 				.mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
mask_set         2142 arch/x86/mm/pageattr.c 				.mask_set = __pgprot(0),
mask_set         2221 arch/x86/mm/pageattr.c 		.mask_set = __pgprot(0),
mask_set         2234 arch/x86/mm/pageattr.c 	cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
mask_set         2264 arch/x86/mm/pageattr.c 		.mask_set	= __pgprot(0),
mask_set          799 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c 				     u32 chnn_num, u32 mask_set)
mask_set          802 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c 		       DSAF_XGE_INT_MSK_0_REG + 0x4 * chnn_num, mask_set);
mask_set           33 drivers/pinctrl/mediatek/mtk-eint.c 	.mask_set  = 0x0c0,
mask_set          114 drivers/pinctrl/mediatek/mtk-eint.c 						eint->regs->mask_set);
mask_set          219 drivers/pinctrl/mediatek/mtk-eint.c 		writel_relaxed(~buf[port], reg + eint->regs->mask_set);
mask_set          337 drivers/pinctrl/mediatek/mtk-eint.c 					eint->regs->mask_set);
mask_set           18 drivers/pinctrl/mediatek/mtk-eint.h 	unsigned int	mask_set;
mask_set          170 drivers/pinctrl/mediatek/pinctrl-mtk-common.h 	unsigned int  mask_set;