mar 324 arch/c6x/platforms/cache.c unsigned int mar = IMCR_MAR_BASE + ((start >> 24) << 2); mar 327 arch/c6x/platforms/cache.c for (; mar <= mar_e; mar += 4) mar 328 arch/c6x/platforms/cache.c imcr_set(mar, imcr_get(mar) | 1); mar 333 arch/c6x/platforms/cache.c unsigned int mar = IMCR_MAR_BASE + ((start >> 24) << 2); mar 336 arch/c6x/platforms/cache.c for (; mar <= mar_e; mar += 4) mar 337 arch/c6x/platforms/cache.c imcr_set(mar, imcr_get(mar) & ~1); mar 93 arch/powerpc/include/asm/fsl_lbc.h __be32 mar; /**< UPM Address Register */ mar 293 arch/powerpc/include/asm/fsl_lbc.h u32 mar); mar 152 arch/powerpc/sysdev/fsl_lbc.c int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar) mar 162 arch/powerpc/sysdev/fsl_lbc.c out_be32(&fsl_lbc_ctrl_dev->regs->mar, mar); mar 80 drivers/mtd/nand/raw/fsl_upm.c u32 mar; mar 98 drivers/mtd/nand/raw/fsl_upm.c mar = (cmd << (32 - fun->upm.width)) | mar 100 drivers/mtd/nand/raw/fsl_upm.c fsl_upm_run_pattern(&fun->upm, chip->legacy.IO_ADDR_R, mar);