mappable_end     1430 drivers/char/agp/intel-gtt.c 		   resource_size_t *mappable_end)
mappable_end     1434 drivers/char/agp/intel-gtt.c 	*mappable_end = intel_private.gtt_mappable_entries << PAGE_SHIFT;
mappable_end      236 drivers/gpu/drm/i915/display/intel_fbdev.c 	info->apertures->ranges[0].size = ggtt->mappable_end;
mappable_end     1053 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 				 0, ggtt->mappable_end,
mappable_end      380 drivers/gpu/drm/i915/gvt/gvt.h #define gvt_aperture_sz(gvt)	  (gvt->dev_priv->ggtt.mappable_end)
mappable_end      435 drivers/gpu/drm/i915/i915_drv.c 	ap->ranges[0].size = ggtt->mappable_end;
mappable_end       71 drivers/gpu/drm/i915/i915_gem.c 					   0, ggtt->mappable_end,
mappable_end      998 drivers/gpu/drm/i915/i915_gem.c 		if (obj->base.size > dev_priv->ggtt.mappable_end)
mappable_end     1017 drivers/gpu/drm/i915/i915_gem.c 		    obj->base.size > dev_priv->ggtt.mappable_end / 2)
mappable_end     1031 drivers/gpu/drm/i915/i915_gem.c 			    vma->fence_size > dev_priv->ggtt.mappable_end / 2)
mappable_end     2700 drivers/gpu/drm/i915/i915_gem_gtt.c 					  0, ggtt->mappable_end,
mappable_end     2993 drivers/gpu/drm/i915/i915_gem_gtt.c 	ggtt->mappable_end = resource_size(&ggtt->gmadr);
mappable_end     3050 drivers/gpu/drm/i915/i915_gem_gtt.c 	ggtt->mappable_end = resource_size(&ggtt->gmadr);
mappable_end     3055 drivers/gpu/drm/i915/i915_gem_gtt.c 	if (ggtt->mappable_end < (64<<20) || ggtt->mappable_end > (512<<20)) {
mappable_end     3056 drivers/gpu/drm/i915/i915_gem_gtt.c 		DRM_ERROR("Unknown GMADR size (%pa)\n", &ggtt->mappable_end);
mappable_end     3115 drivers/gpu/drm/i915/i915_gem_gtt.c 	intel_gtt_get(&ggtt->vm.total, &gmadr_base, &ggtt->mappable_end);
mappable_end     3119 drivers/gpu/drm/i915/i915_gem_gtt.c 						 ggtt->mappable_end);
mappable_end     3164 drivers/gpu/drm/i915/i915_gem_gtt.c 		ggtt->mappable_end =
mappable_end     3165 drivers/gpu/drm/i915/i915_gem_gtt.c 			min_t(u64, ggtt->mappable_end, ggtt->vm.total);
mappable_end     3168 drivers/gpu/drm/i915/i915_gem_gtt.c 	if (ggtt->mappable_end > ggtt->vm.total) {
mappable_end     3171 drivers/gpu/drm/i915/i915_gem_gtt.c 			  &ggtt->mappable_end, ggtt->vm.total);
mappable_end     3172 drivers/gpu/drm/i915/i915_gem_gtt.c 		ggtt->mappable_end = ggtt->vm.total;
mappable_end     3177 drivers/gpu/drm/i915/i915_gem_gtt.c 	DRM_DEBUG_DRIVER("GMADR size = %lluM\n", (u64)ggtt->mappable_end >> 20);
mappable_end     3221 drivers/gpu/drm/i915/i915_gem_gtt.c 				ggtt->mappable_end)) {
mappable_end     3227 drivers/gpu/drm/i915/i915_gem_gtt.c 	ggtt->mtrr = arch_phys_wc_add(ggtt->gmadr.start, ggtt->mappable_end);
mappable_end      391 drivers/gpu/drm/i915/i915_gem_gtt.h 	resource_size_t mappable_end;	/* End offset that we can CPU map */
mappable_end      225 drivers/gpu/drm/i915/i915_vgpu.c 	unsigned long mappable_base, mappable_size, mappable_end;
mappable_end      241 drivers/gpu/drm/i915/i915_vgpu.c 	mappable_end = mappable_base + mappable_size;
mappable_end      250 drivers/gpu/drm/i915/i915_vgpu.c 	if (mappable_end > ggtt->mappable_end ||
mappable_end      251 drivers/gpu/drm/i915/i915_vgpu.c 	    unmappable_base < ggtt->mappable_end ||
mappable_end      258 drivers/gpu/drm/i915/i915_vgpu.c 	if (unmappable_base > ggtt->mappable_end) {
mappable_end      260 drivers/gpu/drm/i915/i915_vgpu.c 					ggtt->mappable_end, unmappable_base);
mappable_end      282 drivers/gpu/drm/i915/i915_vgpu.c 	if (mappable_end < ggtt->mappable_end) {
mappable_end      284 drivers/gpu/drm/i915/i915_vgpu.c 					mappable_end, ggtt->mappable_end);
mappable_end      472 drivers/gpu/drm/i915/i915_vma.c 	mappable = vma->node.start + vma->fence_size <= i915_vm_to_ggtt(vma->vm)->mappable_end;
mappable_end      570 drivers/gpu/drm/i915/i915_vma.c 		end = min_t(u64, end, dev_priv->ggtt.mappable_end);
mappable_end     1167 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 					  0, ggtt->mappable_end,
mappable_end      265 drivers/gpu/drm/i915/selftests/i915_vma.c 		VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | (ggtt->mappable_end - 4096)),
mappable_end      266 drivers/gpu/drm/i915/selftests/i915_vma.c 		VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | (ggtt->mappable_end - 4096)),
mappable_end      269 drivers/gpu/drm/i915/selftests/i915_vma.c 		VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | (ggtt->mappable_end - 4096)),
mappable_end      270 drivers/gpu/drm/i915/selftests/i915_vma.c 		INVALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | ggtt->mappable_end),
mappable_end      277 drivers/gpu/drm/i915/selftests/i915_vma.c 		VALID(ggtt->mappable_end - 4096, PIN_GLOBAL | PIN_MAPPABLE),
mappable_end      278 drivers/gpu/drm/i915/selftests/i915_vma.c 		VALID(ggtt->mappable_end, PIN_GLOBAL | PIN_MAPPABLE),
mappable_end      279 drivers/gpu/drm/i915/selftests/i915_vma.c 		NOSPACE(ggtt->mappable_end + 4096, PIN_GLOBAL | PIN_MAPPABLE),
mappable_end      284 drivers/gpu/drm/i915/selftests/i915_vma.c 		INVALID(8192, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | (ggtt->mappable_end - 4096)),
mappable_end      288 drivers/gpu/drm/i915/selftests/i915_vma.c 		VALID(8192, PIN_GLOBAL | PIN_OFFSET_BIAS | (ggtt->mappable_end - 4096)),
mappable_end      296 drivers/gpu/drm/i915/selftests/i915_vma.c 		NOSPACE(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | ggtt->mappable_end),
mappable_end      298 drivers/gpu/drm/i915/selftests/i915_vma.c 		NOSPACE(8192, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | (ggtt->mappable_end - 4096)),
mappable_end      106 drivers/gpu/drm/i915/selftests/mock_gtt.c 	ggtt->mappable_end = resource_size(&ggtt->gmadr);
mappable_end       12 include/drm/intel-gtt.h 		   resource_size_t *mappable_end);