malidp             27 drivers/gpu/drm/arm/malidp_crtc.c 	struct malidp_drm *malidp = crtc_to_malidp_device(crtc);
malidp             28 drivers/gpu/drm/arm/malidp_crtc.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp             51 drivers/gpu/drm/arm/malidp_crtc.c 	struct malidp_drm *malidp = crtc_to_malidp_device(crtc);
malidp             52 drivers/gpu/drm/arm/malidp_crtc.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp             75 drivers/gpu/drm/arm/malidp_crtc.c 	struct malidp_drm *malidp = crtc_to_malidp_device(crtc);
malidp             76 drivers/gpu/drm/arm/malidp_crtc.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp            250 drivers/gpu/drm/arm/malidp_crtc.c 	struct malidp_drm *malidp = crtc_to_malidp_device(crtc);
malidp            251 drivers/gpu/drm/arm/malidp_crtc.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp            340 drivers/gpu/drm/arm/malidp_crtc.c 	struct malidp_drm *malidp = crtc_to_malidp_device(crtc);
malidp            341 drivers/gpu/drm/arm/malidp_crtc.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp            423 drivers/gpu/drm/arm/malidp_crtc.c 		    (1 << drm_connector_index(&malidp->mw_connector.base)))
malidp            491 drivers/gpu/drm/arm/malidp_crtc.c 	struct malidp_drm *malidp = crtc_to_malidp_device(crtc);
malidp            492 drivers/gpu/drm/arm/malidp_crtc.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp            501 drivers/gpu/drm/arm/malidp_crtc.c 	struct malidp_drm *malidp = crtc_to_malidp_device(crtc);
malidp            502 drivers/gpu/drm/arm/malidp_crtc.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp            522 drivers/gpu/drm/arm/malidp_crtc.c 	struct malidp_drm *malidp = drm->dev_private;
malidp            544 drivers/gpu/drm/arm/malidp_crtc.c 	ret = drm_crtc_init_with_planes(drm, &malidp->crtc, primary, NULL,
malidp            549 drivers/gpu/drm/arm/malidp_crtc.c 	drm_crtc_helper_add(&malidp->crtc, &malidp_crtc_helper_funcs);
malidp            550 drivers/gpu/drm/arm/malidp_crtc.c 	drm_mode_crtc_set_gamma_size(&malidp->crtc, MALIDP_GAMMA_LUT_SIZE);
malidp            552 drivers/gpu/drm/arm/malidp_crtc.c 	drm_crtc_enable_color_mgmt(&malidp->crtc, 0, true, MALIDP_GAMMA_LUT_SIZE);
malidp            554 drivers/gpu/drm/arm/malidp_crtc.c 	malidp_se_set_enh_coeffs(malidp->dev);
malidp             63 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_drm *malidp = crtc_to_malidp_device(crtc);
malidp             64 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp             90 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_drm *malidp = crtc_to_malidp_device(crtc);
malidp             91 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp            122 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_drm *malidp = crtc_to_malidp_device(crtc);
malidp            123 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp            171 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_drm *malidp = drm->dev_private;
malidp            172 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp            178 drivers/gpu/drm/arm/malidp_drv.c 		atomic_set(&malidp->config_valid, MALIDP_CONFIG_VALID_DONE);
malidp            182 drivers/gpu/drm/arm/malidp_drv.c 	ret = wait_event_interruptible_timeout(malidp->wq,
malidp            183 drivers/gpu/drm/arm/malidp_drv.c 			atomic_read(&malidp->config_valid) == MALIDP_CONFIG_VALID_DONE,
malidp            192 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_drm *malidp = drm->dev_private;
malidp            195 drivers/gpu/drm/arm/malidp_drv.c 	malidp->event = malidp->crtc.state->event;
malidp            196 drivers/gpu/drm/arm/malidp_drv.c 	malidp->crtc.state->event = NULL;
malidp            198 drivers/gpu/drm/arm/malidp_drv.c 	if (malidp->crtc.state->active) {
malidp            204 drivers/gpu/drm/arm/malidp_drv.c 		if (malidp->event)
malidp            205 drivers/gpu/drm/arm/malidp_drv.c 			drm_crtc_vblank_get(&malidp->crtc);
malidp            220 drivers/gpu/drm/arm/malidp_drv.c 	} else if (malidp->event) {
malidp            223 drivers/gpu/drm/arm/malidp_drv.c 		drm_crtc_send_vblank_event(&malidp->crtc, malidp->event);
malidp            224 drivers/gpu/drm/arm/malidp_drv.c 		malidp->event = NULL;
malidp            233 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_drm *malidp = drm->dev_private;
malidp            244 drivers/gpu/drm/arm/malidp_drv.c 	atomic_set(&malidp->config_valid, MALIDP_CONFIG_START);
malidp            245 drivers/gpu/drm/arm/malidp_drv.c 	malidp->dev->hw->set_config_valid(malidp->dev, 0);
malidp            392 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_drm *malidp = drm->dev_private;
malidp            393 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp            429 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_drm *malidp = drm->dev_private;
malidp            430 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp            463 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_drm *malidp = drm->dev_private;
malidp            465 drivers/gpu/drm/arm/malidp_drv.c 	u8 alignment = malidp_hw_get_pitch_align(malidp->dev, 1);
malidp            481 drivers/gpu/drm/arm/malidp_drv.c void malidp_error(struct malidp_drm *malidp,
malidp            487 drivers/gpu/drm/arm/malidp_drv.c 	spin_lock_irqsave(&malidp->errors_lock, irqflags);
malidp            491 drivers/gpu/drm/arm/malidp_drv.c 	spin_unlock_irqrestore(&malidp->errors_lock, irqflags);
malidp            509 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_drm *malidp = drm->dev_private;
malidp            513 drivers/gpu/drm/arm/malidp_drv.c 	spin_lock_irqsave(&malidp->errors_lock, irqflags);
malidp            514 drivers/gpu/drm/arm/malidp_drv.c 	de_errors = malidp->de_errors;
malidp            515 drivers/gpu/drm/arm/malidp_drv.c 	se_errors = malidp->se_errors;
malidp            516 drivers/gpu/drm/arm/malidp_drv.c 	spin_unlock_irqrestore(&malidp->errors_lock, irqflags);
malidp            532 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_drm *malidp = drm->dev_private;
malidp            535 drivers/gpu/drm/arm/malidp_drv.c 	spin_lock_irqsave(&malidp->errors_lock, irqflags);
malidp            536 drivers/gpu/drm/arm/malidp_drv.c 	malidp_error_stats_init(&malidp->de_errors);
malidp            537 drivers/gpu/drm/arm/malidp_drv.c 	malidp_error_stats_init(&malidp->se_errors);
malidp            538 drivers/gpu/drm/arm/malidp_drv.c 	spin_unlock_irqrestore(&malidp->errors_lock, irqflags);
malidp            553 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_drm *malidp = minor->dev->dev_private;
malidp            555 drivers/gpu/drm/arm/malidp_drv.c 	malidp_error_stats_init(&malidp->de_errors);
malidp            556 drivers/gpu/drm/arm/malidp_drv.c 	malidp_error_stats_init(&malidp->se_errors);
malidp            557 drivers/gpu/drm/arm/malidp_drv.c 	spin_lock_init(&malidp->errors_lock);
malidp            663 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_drm *malidp = drm->dev_private;
malidp            665 drivers/gpu/drm/arm/malidp_drv.c 	return snprintf(buf, PAGE_SIZE, "%08x\n", malidp->core_id);
malidp            690 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_drm *malidp = drm->dev_private;
malidp            691 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp            709 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_drm *malidp = drm->dev_private;
malidp            710 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp            726 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_drm *malidp;
malidp            736 drivers/gpu/drm/arm/malidp_drv.c 	malidp = devm_kzalloc(dev, sizeof(*malidp), GFP_KERNEL);
malidp            737 drivers/gpu/drm/arm/malidp_drv.c 	if (!malidp)
malidp            745 drivers/gpu/drm/arm/malidp_drv.c 	malidp->dev = hwdev;
malidp            779 drivers/gpu/drm/arm/malidp_drv.c 	drm->dev_private = malidp;
malidp            818 drivers/gpu/drm/arm/malidp_drv.c 	malidp->core_id = version;
malidp            832 drivers/gpu/drm/arm/malidp_drv.c 	atomic_set(&malidp->config_valid, MALIDP_CONFIG_VALID_INIT);
malidp            833 drivers/gpu/drm/arm/malidp_drv.c 	init_waitqueue_head(&malidp->wq);
malidp            844 drivers/gpu/drm/arm/malidp_drv.c 	malidp->crtc.port = of_graph_get_port_by_id(dev->of_node, 0);
malidp            868 drivers/gpu/drm/arm/malidp_drv.c 	drm_crtc_vblank_reset(&malidp->crtc);
malidp            898 drivers/gpu/drm/arm/malidp_drv.c 	of_node_put(malidp->crtc.port);
malidp            899 drivers/gpu/drm/arm/malidp_drv.c 	malidp->crtc.port = NULL;
malidp            921 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_drm *malidp = drm->dev_private;
malidp            922 drivers/gpu/drm/arm/malidp_drv.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp            927 drivers/gpu/drm/arm/malidp_drv.c 	drm_crtc_vblank_off(&malidp->crtc);
malidp            933 drivers/gpu/drm/arm/malidp_drv.c 	of_node_put(malidp->crtc.port);
malidp            934 drivers/gpu/drm/arm/malidp_drv.c 	malidp->crtc.port = NULL;
malidp             97 drivers/gpu/drm/arm/malidp_drv.h void malidp_error(struct malidp_drm *malidp,
malidp           1162 drivers/gpu/drm/arm/malidp_hw.c 	struct malidp_drm *malidp = drm->dev_private;
malidp           1169 drivers/gpu/drm/arm/malidp_hw.c 	hwdev = malidp->dev;
malidp           1186 drivers/gpu/drm/arm/malidp_hw.c 		if (malidp->event != NULL) {
malidp           1188 drivers/gpu/drm/arm/malidp_hw.c 			drm_crtc_send_vblank_event(&malidp->crtc, malidp->event);
malidp           1189 drivers/gpu/drm/arm/malidp_hw.c 			malidp->event = NULL;
malidp           1192 drivers/gpu/drm/arm/malidp_hw.c 		atomic_set(&malidp->config_valid, MALIDP_CONFIG_VALID_DONE);
malidp           1203 drivers/gpu/drm/arm/malidp_hw.c 	if ((status & de->vsync_irq) && malidp->crtc.enabled)
malidp           1204 drivers/gpu/drm/arm/malidp_hw.c 		drm_crtc_handle_vblank(&malidp->crtc);
malidp           1208 drivers/gpu/drm/arm/malidp_hw.c 		malidp_error(malidp, &malidp->de_errors, status,
malidp           1209 drivers/gpu/drm/arm/malidp_hw.c 			     drm_crtc_vblank_count(&malidp->crtc));
malidp           1220 drivers/gpu/drm/arm/malidp_hw.c 	struct malidp_drm *malidp = drm->dev_private;
malidp           1222 drivers/gpu/drm/arm/malidp_hw.c 	wake_up(&malidp->wq);
malidp           1246 drivers/gpu/drm/arm/malidp_hw.c 	struct malidp_drm *malidp = drm->dev_private;
malidp           1247 drivers/gpu/drm/arm/malidp_hw.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp           1280 drivers/gpu/drm/arm/malidp_hw.c 	struct malidp_drm *malidp = drm->dev_private;
malidp           1281 drivers/gpu/drm/arm/malidp_hw.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp           1300 drivers/gpu/drm/arm/malidp_hw.c 		malidp_error(malidp, &malidp->se_errors, status,
malidp           1301 drivers/gpu/drm/arm/malidp_hw.c 			     drm_crtc_vblank_count(&malidp->crtc));
malidp           1309 drivers/gpu/drm/arm/malidp_hw.c 			drm_writeback_signal_completion(&malidp->mw_connector, 0);
malidp           1312 drivers/gpu/drm/arm/malidp_hw.c 			drm_writeback_signal_completion(&malidp->mw_connector, 0);
malidp           1317 drivers/gpu/drm/arm/malidp_hw.c 			drm_writeback_signal_completion(&malidp->mw_connector, 0);
malidp           1328 drivers/gpu/drm/arm/malidp_hw.c 			if ((atomic_read(&malidp->config_valid) != MALIDP_CONFIG_START) ||
malidp           1357 drivers/gpu/drm/arm/malidp_hw.c 	struct malidp_drm *malidp = drm->dev_private;
malidp           1358 drivers/gpu/drm/arm/malidp_hw.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp            130 drivers/gpu/drm/arm/malidp_mw.c 	struct malidp_drm *malidp = encoder->dev->dev_private;
malidp            151 drivers/gpu/drm/arm/malidp_mw.c 		malidp_hw_get_format_id(&malidp->dev->hw->map, SE_MEMWRITE,
malidp            166 drivers/gpu/drm/arm/malidp_mw.c 		u8 alignment = malidp_hw_get_pitch_align(malidp->dev, 0);
malidp            188 drivers/gpu/drm/arm/malidp_mw.c static u32 *get_writeback_formats(struct malidp_drm *malidp, int *n_formats)
malidp            190 drivers/gpu/drm/arm/malidp_mw.c 	const struct malidp_hw_regmap *map = &malidp->dev->hw->map;
malidp            211 drivers/gpu/drm/arm/malidp_mw.c 	struct malidp_drm *malidp = drm->dev_private;
malidp            215 drivers/gpu/drm/arm/malidp_mw.c 	if (!malidp->dev->hw->enable_memwrite)
malidp            218 drivers/gpu/drm/arm/malidp_mw.c 	malidp->mw_connector.encoder.possible_crtcs = 1 << drm_crtc_index(&malidp->crtc);
malidp            219 drivers/gpu/drm/arm/malidp_mw.c 	drm_connector_helper_add(&malidp->mw_connector.base,
malidp            222 drivers/gpu/drm/arm/malidp_mw.c 	formats = get_writeback_formats(malidp, &n_formats);
malidp            226 drivers/gpu/drm/arm/malidp_mw.c 	ret = drm_writeback_connector_init(drm, &malidp->mw_connector,
malidp            240 drivers/gpu/drm/arm/malidp_mw.c 	struct malidp_drm *malidp = drm->dev_private;
malidp            241 drivers/gpu/drm/arm/malidp_mw.c 	struct drm_writeback_connector *mw_conn = &malidp->mw_connector;
malidp            243 drivers/gpu/drm/arm/malidp_mw.c 	struct malidp_hw_device *hwdev = malidp->dev;
malidp            153 drivers/gpu/drm/arm/malidp_planes.c 	struct malidp_drm *malidp = drm->dev_private;
malidp            154 drivers/gpu/drm/arm/malidp_planes.c 	const struct malidp_hw_regmap *map = &malidp->dev->hw->map;
malidp            927 drivers/gpu/drm/arm/malidp_planes.c 	struct malidp_drm *malidp = drm->dev_private;
malidp            928 drivers/gpu/drm/arm/malidp_planes.c 	const struct malidp_hw_regmap *map = &malidp->dev->hw->map;
malidp            996 drivers/gpu/drm/arm/malidp_planes.c 		plane->hwdev = malidp->dev;
malidp           1008 drivers/gpu/drm/arm/malidp_planes.c 		malidp_hw_write(malidp->dev, MALIDP_ALPHA_LUT,