mainclk_hz        698 arch/mips/alchemy/devboards/db1200.c 	.mainclk_hz	= 50000000,	/* PSC0 clock */
mainclk_hz        269 arch/mips/alchemy/devboards/db1550.c 	.mainclk_hz	= 48000000,	/* PSC0 clock: max. 2.4MHz SPI clk */
mainclk_hz        601 arch/mips/alchemy/devboards/db1550.c 		clk_set_rate(c, db1550_spi_platdata.mainclk_hz);
mainclk_hz         10 arch/mips/include/asm/mach-au1x00/au1550_spi.h 	u32 mainclk_hz;		/* main input clock frequency of PSC */
mainclk_hz        104 drivers/spi/spi-au1550.c 	u32 mainclk_hz = hw->pdata->mainclk_hz;
mainclk_hz        108 drivers/spi/spi-au1550.c 		brg = mainclk_hz / speed_hz / (4 << div);
mainclk_hz        875 drivers/spi/spi-au1550.c 		master->max_speed_hz = hw->pdata->mainclk_hz / min_div;
mainclk_hz        877 drivers/spi/spi-au1550.c 				hw->pdata->mainclk_hz / (max_div + 1) + 1;