m_pll             126 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	u32 m_pll = 0;
m_pll             164 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 				m_pll = (m_n_int + 1) * n_pll;
m_pll             167 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 				m_pll = m_n_int * n_pll + 2;
m_pll             170 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 				m_pll = m_n_int * n_pll;
m_pll             175 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 				m_pll = (m_n_int + 1) * n_pll;
m_pll             178 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 				m_pll = (m_n_int + 1) * n_pll;
m_pll             181 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 				m_pll = m_n_int * n_pll + 1;
m_pll             184 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 				m_pll = m_n_int * n_pll;
m_pll             199 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 		if (m_pll == 2) {
m_pll             204 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 		} else if (m_pll >= 2 * 2 * r_pll && m_pll <= 2 * 4 * r_pll) {
m_pll             205 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 			phy->pll_pre_p = m_pll / (2 * r_pll);
m_pll             209 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 		} else if (m_pll >= 2 * 5 * r_pll && m_pll <= 2 * 150 * r_pll) {
m_pll             210 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 			if (((m_pll / (2 * r_pll)) % 2) == 0) {
m_pll             212 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 					(m_pll / (2 * r_pll)) / 2 - 1;
m_pll             214 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 					(m_pll / (2 * r_pll)) % 2 + 2;
m_pll             217 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 					(m_pll / (2 * r_pll)) / 2;
m_pll             219 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 					(m_pll / (2 * r_pll)) % 2;
m_pll             230 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 		f_kHz = (u64)1000000000 * (u64)m_pll /