m_offset           91 drivers/clk/ingenic/cgu.c 	m += pll_info->m_offset;
m_offset          133 drivers/clk/ingenic/cgu.c 	m = max_t(unsigned, m, pll_info->m_offset);
m_offset          189 drivers/clk/ingenic/cgu.c 	ctl |= (m - pll_info->m_offset) << pll_info->m_shift;
m_offset           48 drivers/clk/ingenic/cgu.h 	u8 m_shift, m_bits, m_offset;
m_offset           59 drivers/clk/ingenic/jz4725b-cgu.c 			.m_offset = 2,
m_offset           74 drivers/clk/ingenic/jz4740-cgu.c 			.m_offset = 2,
m_offset          107 drivers/clk/ingenic/jz4770-cgu.c 			.m_offset = 1,
m_offset          129 drivers/clk/ingenic/jz4770-cgu.c 			.m_offset = 1,
m_offset          226 drivers/clk/ingenic/jz4780-cgu.c 	.m_offset = 1, \
m_offset           19 drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c 	u8			m_offset;
m_offset           30 drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c 					    const u8 m_offset,
m_offset           41 drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c 				(_m + m_offset);
m_offset           68 drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c 				      ddc->m_offset, NULL, NULL);
m_offset           83 drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c 	       (m + ddc->m_offset);
m_offset           93 drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c 			       ddc->m_offset, &div_m, &div_n);
m_offset          135 drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c 	ddc->m_offset = hdmi->variant->ddc_clk_m_offset;
m_offset         1415 mm/zsmalloc.c  	unsigned long m_offset;
m_offset         1423 mm/zsmalloc.c  	m_offset = offset & ~PAGE_MASK;
m_offset         1430 mm/zsmalloc.c  	link = (struct link_free *)vaddr + m_offset / sizeof(*link);