m2 47 arch/mips/kernel/cpu-bugs64.c int m1, m2; m2 71 arch/mips/kernel/cpu-bugs64.c : "=r" (m1), "=r" (m2), "=r" (s) m2 92 arch/mips/kernel/cpu-bugs64.c : "r" (m1), "r" (m2), "r" (s), "I" (0) m2 102 arch/mips/kernel/cpu-bugs64.c : "=r" (m1), "=r" (m2), "=r" (s) m2 103 arch/mips/kernel/cpu-bugs64.c : "0" (m1), "1" (m2), "2" (s)); m2 105 arch/mips/kernel/cpu-bugs64.c p = m1 * m2; m2 35 arch/x86/kernel/cpu/mce/genpool.c struct mce *m1, *m2; m2 40 arch/x86/kernel/cpu/mce/genpool.c m2 = &node->mce; m2 42 arch/x86/kernel/cpu/mce/genpool.c if (!mce_cmp(m1, m2)) m2 89 arch/x86/kernel/cpu/mce/internal.h static inline bool mce_cmp(struct mce *m1, struct mce *m2) m2 91 arch/x86/kernel/cpu/mce/internal.h return m1->bank != m2->bank || m2 92 arch/x86/kernel/cpu/mce/internal.h m1->status != m2->status || m2 93 arch/x86/kernel/cpu/mce/internal.h m1->addr != m2->addr || m2 94 arch/x86/kernel/cpu/mce/internal.h m1->misc != m2->misc; m2 120 arch/xtensa/variants/csp/include/variant/tie.h XCHAL_SA_REG(s,0,0,0,1, m2, 4, 4, 4,0x0222, sr,34 , 32,0,0,0) \ m2 98 arch/xtensa/variants/dc232b/include/variant/tie.h XCHAL_SA_REG(s,0,0,0,1, m2, 4, 4, 4,0x0222, sr,34 , 32,0,0,0) \ m2 118 arch/xtensa/variants/dc233c/include/variant/tie.h XCHAL_SA_REG(s,0,0,0,1, m2, 4, 4, 4,0x0222, sr,34 , 32,0,0,0) \ m2 95 arch/xtensa/variants/de212/include/variant/tie.h XCHAL_SA_REG(s,0,0,0,1, m2, 4, 4, 4,0x0222, sr,34 , 32,0,0,0) \ m2 123 arch/xtensa/variants/test_kc705_be/include/variant/tie.h XCHAL_SA_REG(s,0,0,0,1, m2, 4, 4, 4,0x0222, sr,34 , 32,0,0,0) \ m2 121 arch/xtensa/variants/test_kc705_hifi/include/variant/tie.h XCHAL_SA_REG(s,0,0,0,1, m2, 4, 4, 4,0x0222, sr,34 , 32,0,0,0) \ m2 351 crypto/ecc.c u64 m2 = a1 * b0; m2 354 crypto/ecc.c m2 += (m0 >> 32); m2 355 crypto/ecc.c m2 += m1; m2 358 crypto/ecc.c if (m2 < m1) m2 361 crypto/ecc.c result.m_low = (m0 & 0xffffffffull) | (m2 << 32); m2 362 crypto/ecc.c result.m_high = m3 + (m2 >> 32); m2 52 crypto/nhpoly1305.c u32 m2 = get_unaligned_le32(message + 8); m2 55 crypto/nhpoly1305.c sums[0] += (u64)(u32)(m0 + key[ 0]) * (u32)(m2 + key[ 2]); m2 56 crypto/nhpoly1305.c sums[1] += (u64)(u32)(m0 + key[ 4]) * (u32)(m2 + key[ 6]); m2 57 crypto/nhpoly1305.c sums[2] += (u64)(u32)(m0 + key[ 8]) * (u32)(m2 + key[10]); m2 58 crypto/nhpoly1305.c sums[3] += (u64)(u32)(m0 + key[12]) * (u32)(m2 + key[14]); m2 127 crypto/vmac.c u64 m2 = MUL32(_i1>>32, _i2); \ m2 131 crypto/vmac.c ADD128(rh, rl, (m2 >> 32), (m2 << 32)); \ m2 255 crypto/vmac.c u64 t1, t2, m1, m2, t; \ m2 261 crypto/vmac.c m2 = MUL32(t1 >> 32, t2); \ m2 266 crypto/vmac.c + (u32)(m2 >> 32); \ m2 267 crypto/vmac.c t += (u64)(u32)m1 + (u32)m2; \ m2 334 drivers/ata/ahci_imx.c int m1, m2, a; m2 391 drivers/ata/ahci_imx.c m2 = read_adc_sum(dev, rtune_ctl_reg, mmio); m2 411 drivers/ata/ahci_imx.c if (!(m2 / 1000)) m2 412 drivers/ata/ahci_imx.c m2 = 1000; m2 413 drivers/ata/ahci_imx.c a = (m2 - m1) / (m2/1000); m2 3349 drivers/ata/sata_mv.c u32 m2, m3; m2 3352 drivers/ata/sata_mv.c m2 = readl(port_mmio + PHY_MODE2); m2 3353 drivers/ata/sata_mv.c m2 &= ~(1 << 16); m2 3354 drivers/ata/sata_mv.c m2 |= (1 << 31); m2 3355 drivers/ata/sata_mv.c writel(m2, port_mmio + PHY_MODE2); m2 3359 drivers/ata/sata_mv.c m2 = readl(port_mmio + PHY_MODE2); m2 3360 drivers/ata/sata_mv.c m2 &= ~((1 << 16) | (1 << 31)); m2 3361 drivers/ata/sata_mv.c writel(m2, port_mmio + PHY_MODE2); m2 3399 drivers/ata/sata_mv.c m2 = readl(port_mmio + PHY_MODE2); m2 3401 drivers/ata/sata_mv.c m2 &= ~MV_M2_PREAMP_MASK; m2 3402 drivers/ata/sata_mv.c m2 |= hpriv->signal[port].amps; m2 3403 drivers/ata/sata_mv.c m2 |= hpriv->signal[port].pre; m2 3404 drivers/ata/sata_mv.c m2 &= ~(1 << 16); m2 3408 drivers/ata/sata_mv.c m2 &= ~0xC30FF01F; m2 3409 drivers/ata/sata_mv.c m2 |= 0x0000900F; m2 3412 drivers/ata/sata_mv.c writel(m2, port_mmio + PHY_MODE2); m2 95 drivers/clk/meson/axg-aoclk.c .m2 = 11, m2 116 drivers/clk/meson/axg-aoclk.c .m2 = { m2 43 drivers/clk/meson/clk-dualdiv.c return DIV_ROUND_CLOSEST(parent_rate * (p->m1 + p->m2), m2 44 drivers/clk/meson/clk-dualdiv.c p->n1 * p->m1 + p->n2 * p->m2); m2 58 drivers/clk/meson/clk-dualdiv.c setting.m2 = meson_parm_read(clk->map, &dualdiv->m2) + 1; m2 118 drivers/clk/meson/clk-dualdiv.c meson_parm_write(clk->map, &dualdiv->m2, setting->m2 - 1); m2 17 drivers/clk/meson/clk-dualdiv.h unsigned int m2; m2 25 drivers/clk/meson/clk-dualdiv.h struct parm m2; m2 97 drivers/clk/meson/g12a-aoclk.c .m2 = 11, m2 135 drivers/clk/meson/g12a-aoclk.c .m2 = { m2 226 drivers/clk/meson/g12a-aoclk.c .m2 = { m2 81 drivers/clk/meson/gxbb-aoclk.c .m2 = 11, m2 102 drivers/clk/meson/gxbb-aoclk.c .m2 = { m2 201 drivers/dma/xgene-dma.c __le64 m2; m2 392 drivers/dma/xgene-dma.c return &desc->m2; m2 428 drivers/dma/xgene-dma.c desc1->m2 |= cpu_to_le64(XGENE_DMA_DESC_DR_BIT); m2 435 drivers/dma/xgene-dma.c desc1->m2 |= cpu_to_le64(xgene_dma_encode_xor_flyby(src_cnt)); m2 443 drivers/dma/xgene-dma.c desc1->m2 |= cpu_to_le64((scf[i] << ((i + 1) * 8))); m2 30 drivers/firmware/efi/fake_mem.c const struct efi_mem_range *m2 = x2; m2 32 drivers/firmware/efi/fake_mem.c if (m1->range.start < m2->range.start) m2 34 drivers/firmware/efi/fake_mem.c if (m1->range.start > m2->range.start) m2 117 drivers/gpu/drm/amd/display/modules/color/color_gamma.c const struct fixed31_32 m2 = m2 138 drivers/gpu/drm/amd/display/modules/color/color_gamma.c *out_y = dc_fixpt_pow(base, m2); m2 146 drivers/gpu/drm/amd/display/modules/color/color_gamma.c const struct fixed31_32 m2 = m2 163 drivers/gpu/drm/amd/display/modules/color/color_gamma.c dc_fixpt_div(dc_fixpt_one, m2)); m2 2155 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c pp_table->AvfsGbCksOn.m2 = m2 2167 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c pp_table->AvfsGbCksOff.m2 = m2 2185 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c pp_table->DisplayClock2Gfxclk[DSPCLK_DISPCLK].m2 = m2 2192 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c pp_table->DisplayClock2Gfxclk[DSPCLK_DISPCLK].m2 = m2 2208 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c pp_table->DisplayClock2Gfxclk[DSPCLK_DCEFCLK].m2 = m2 2215 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c pp_table->DisplayClock2Gfxclk[DSPCLK_DCEFCLK].m2 = m2 2231 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c pp_table->DisplayClock2Gfxclk[DSPCLK_PIXCLK].m2 = m2 2238 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c pp_table->DisplayClock2Gfxclk[DSPCLK_PIXCLK].m2 = m2 2253 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c pp_table->DisplayClock2Gfxclk[DSPCLK_PHYCLK].m2 = m2 2260 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c pp_table->DisplayClock2Gfxclk[DSPCLK_PHYCLK].m2 = m2 2278 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c pp_table->AcgAvfsGb.m2 = avfs_params.ulAcgGbFuseTableM2; m2 584 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h int16_t m2; m2 230 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h int16_t m2; m2 708 drivers/gpu/drm/amd/powerplay/inc/smu75.h int16_t m2; m2 101 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h int32_t m2; m2 1725 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table->AVFSGB_VDROOP_TABLE[0].m2 = PP_HOST_TO_SMC_US(avfs_params.usAVFSGB_FUSE_TABLE_CKSON_m2); m2 1730 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table->AVFSGB_VDROOP_TABLE[1].m2 = PP_HOST_TO_SMC_US(avfs_params.usAVFSGB_FUSE_TABLE_CKSOFF_m2); m2 1605 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table->AVFSGB_FUSE_TABLE[0].m2 = m2 1613 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table->AVFSGB_FUSE_TABLE[1].m2 = m2 41 drivers/gpu/drm/gma500/cdv_intel_display.c .m2 = {.min = 58, .max = 158}, m2 53 drivers/gpu/drm/gma500/cdv_intel_display.c .m2 = {.min = 58, .max = 158}, m2 68 drivers/gpu/drm/gma500/cdv_intel_display.c .m2 = {.min = 65, .max = 130}, m2 80 drivers/gpu/drm/gma500/cdv_intel_display.c .m2 = {.min = 58, .max = 158}, m2 92 drivers/gpu/drm/gma500/cdv_intel_display.c .m2 = {.min = 65, .max = 130}, m2 104 drivers/gpu/drm/gma500/cdv_intel_display.c .m2 = {.min = 58, .max = 162}, m2 271 drivers/gpu/drm/gma500/cdv_intel_display.c m |= ((clock->m2) << SB_M_DIVIDER_SHIFT); m2 394 drivers/gpu/drm/gma500/cdv_intel_display.c clock->m = clock->m2 + 2; m2 415 drivers/gpu/drm/gma500/cdv_intel_display.c clock.m2 = 118; m2 421 drivers/gpu/drm/gma500/cdv_intel_display.c clock.m2 = 98; m2 431 drivers/gpu/drm/gma500/cdv_intel_display.c clock.m2 = 160; m2 437 drivers/gpu/drm/gma500/cdv_intel_display.c clock.m2 = 133; m2 832 drivers/gpu/drm/gma500/cdv_intel_display.c clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2); m2 872 drivers/gpu/drm/gma500/cdv_intel_display.c clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT; m2 676 drivers/gpu/drm/gma500/gma_display.c if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2) m2 681 drivers/gpu/drm/gma500/gma_display.c if (clock->m1 <= clock->m2 && clock->m1 != 0) m2 733 drivers/gpu/drm/gma500/gma_display.c for (clock.m2 = limit->m2.min; m2 734 drivers/gpu/drm/gma500/gma_display.c (clock.m2 < clock.m1 || clock.m1 == 0) && m2 735 drivers/gpu/drm/gma500/gma_display.c clock.m2 <= limit->m2.max; clock.m2++) { m2 21 drivers/gpu/drm/gma500/gma_display.h int m1, m2; m2 40 drivers/gpu/drm/gma500/gma_display.h struct gma_range_t dot, vco, n, m, m1, m2, p, p1; m2 119 drivers/gpu/drm/gma500/oaktrail_crtc.c clock->dot, clock->m, clock->m1, clock->m2, clock->n, m2 31 drivers/gpu/drm/gma500/psb_intel_display.c .m2 = {.min = 3, .max = 7}, m2 43 drivers/gpu/drm/gma500/psb_intel_display.c .m2 = {.min = 3, .max = 7}, m2 68 drivers/gpu/drm/gma500/psb_intel_display.c clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2); m2 150 drivers/gpu/drm/gma500/psb_intel_display.c fp = clock.n << 16 | clock.m1 << 8 | clock.m2; m2 331 drivers/gpu/drm/gma500/psb_intel_display.c clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT; m2 1659 drivers/gpu/drm/i915/display/intel_ddi.c clock.m2 = (pll_state->pll0 & PORT_PLL_M2_MASK) << 22; m2 1661 drivers/gpu/drm/i915/display/intel_ddi.c clock.m2 |= pll_state->pll2 & PORT_PLL_M2_FRAC_MASK; m2 152 drivers/gpu/drm/i915/display/intel_display.c } dot, vco, n, m, m1, m2, p, p1; m2 232 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 6, .max = 16 }, m2 245 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 6, .max = 16 }, m2 258 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 6, .max = 16 }, m2 271 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 3, .max = 7 }, m2 284 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 3, .max = 7 }, m2 298 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 5, .max = 11 }, m2 313 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 5, .max = 11 }, m2 326 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 5, .max = 11 }, m2 340 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 5, .max = 11 }, m2 356 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 0, .max = 254 }, m2 369 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 0, .max = 254 }, m2 387 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 5, .max = 9 }, m2 400 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 5, .max = 9 }, m2 413 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 5, .max = 9 }, m2 427 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 5, .max = 9 }, m2 440 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 5, .max = 9 }, m2 458 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 11, .max = 156 }, m2 474 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 24 << 22, .max = 175 << 22 }, m2 486 drivers/gpu/drm/i915/display/intel_display.c .m2 = { .min = 2 << 22, .max = 255 << 22 }, m2 535 drivers/gpu/drm/i915/display/intel_display.c clock->m = clock->m2 + 2; m2 547 drivers/gpu/drm/i915/display/intel_display.c return 5 * (dpll->m1 + 2) + (dpll->m2 + 2); m2 564 drivers/gpu/drm/i915/display/intel_display.c clock->m = clock->m1 * clock->m2; m2 576 drivers/gpu/drm/i915/display/intel_display.c clock->m = clock->m1 * clock->m2; m2 601 drivers/gpu/drm/i915/display/intel_display.c if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2) m2 608 drivers/gpu/drm/i915/display/intel_display.c if (clock->m1 <= clock->m2) m2 681 drivers/gpu/drm/i915/display/intel_display.c for (clock.m2 = limit->m2.min; m2 682 drivers/gpu/drm/i915/display/intel_display.c clock.m2 <= limit->m2.max; clock.m2++) { m2 683 drivers/gpu/drm/i915/display/intel_display.c if (clock.m2 >= clock.m1) m2 739 drivers/gpu/drm/i915/display/intel_display.c for (clock.m2 = limit->m2.min; m2 740 drivers/gpu/drm/i915/display/intel_display.c clock.m2 <= limit->m2.max; clock.m2++) { m2 802 drivers/gpu/drm/i915/display/intel_display.c for (clock.m2 = limit->m2.max; m2 803 drivers/gpu/drm/i915/display/intel_display.c clock.m2 >= limit->m2.min; clock.m2--) { m2 901 drivers/gpu/drm/i915/display/intel_display.c clock.m2 = DIV_ROUND_CLOSEST(target * clock.p * clock.n, m2 943 drivers/gpu/drm/i915/display/intel_display.c u64 m2; m2 965 drivers/gpu/drm/i915/display/intel_display.c m2 = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(target, clock.p * clock.n) << 22, m2 968 drivers/gpu/drm/i915/display/intel_display.c if (m2 > INT_MAX/clock.m1) m2 971 drivers/gpu/drm/i915/display/intel_display.c clock.m2 = m2; m2 7555 drivers/gpu/drm/i915/display/intel_display.c return (1 << dpll->n) << 16 | dpll->m2; m2 7560 drivers/gpu/drm/i915/display/intel_display.c return dpll->n << 16 | dpll->m1 << 8 | dpll->m2; m2 7760 drivers/gpu/drm/i915/display/intel_display.c bestm2 = pipe_config->dpll.m2; m2 7858 drivers/gpu/drm/i915/display/intel_display.c bestm2_frac = pipe_config->dpll.m2 & 0x3fffff; m2 7860 drivers/gpu/drm/i915/display/intel_display.c bestm2 = pipe_config->dpll.m2 >> 22; m2 8580 drivers/gpu/drm/i915/display/intel_display.c clock.m2 = mdiv & DPIO_M2DIV_MASK; m2 8695 drivers/gpu/drm/i915/display/intel_display.c clock.m2 = (pll_dw0 & 0xff) << 22; m2 8697 drivers/gpu/drm/i915/display/intel_display.c clock.m2 |= pll_dw2 & 0x3fffff; m2 11304 drivers/gpu/drm/i915/display/intel_display.c clock.m2 = (fp & FP_M2_PINEVIEW_DIV_MASK) >> FP_M2_DIV_SHIFT; m2 11307 drivers/gpu/drm/i915/display/intel_display.c clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT; m2 12430 drivers/gpu/drm/i915/display/intel_display.c unsigned int m2, unsigned int n2, m2 12433 drivers/gpu/drm/i915/display/intel_display.c if (m == m2 && n == n2) m2 12436 drivers/gpu/drm/i915/display/intel_display.c if (exact || !m || !n || !m2 || !n2) m2 12443 drivers/gpu/drm/i915/display/intel_display.c m2 <<= 1; m2 12456 drivers/gpu/drm/i915/display/intel_display.c return intel_fuzzy_clock_check(m, m2); m2 16291 drivers/gpu/drm/i915/display/intel_display.c .m2 = 7, m2 440 drivers/gpu/drm/i915/display/intel_display_types.h int m1, m2; m2 97 drivers/gpu/drm/i915/display/intel_dp.c { .p1 = 2, .p2 = 10, .n = 2, .m1 = 23, .m2 = 8 } }, m2 99 drivers/gpu/drm/i915/display/intel_dp.c { .p1 = 1, .p2 = 10, .n = 1, .m1 = 14, .m2 = 2 } } m2 104 drivers/gpu/drm/i915/display/intel_dp.c { .p1 = 2, .p2 = 10, .n = 1, .m1 = 12, .m2 = 9 } }, m2 106 drivers/gpu/drm/i915/display/intel_dp.c { .p1 = 1, .p2 = 10, .n = 2, .m1 = 14, .m2 = 8 } } m2 111 drivers/gpu/drm/i915/display/intel_dp.c { .p1 = 3, .p2 = 2, .n = 5, .m1 = 3, .m2 = 81 } }, m2 113 drivers/gpu/drm/i915/display/intel_dp.c { .p1 = 2, .p2 = 2, .n = 1, .m1 = 2, .m2 = 27 } } m2 127 drivers/gpu/drm/i915/display/intel_dp.c { .p1 = 4, .p2 = 2, .n = 1, .m1 = 2, .m2 = 0x819999a } }, m2 129 drivers/gpu/drm/i915/display/intel_dp.c { .p1 = 4, .p2 = 1, .n = 1, .m1 = 2, .m2 = 0x6c00000 } }, m2 1771 drivers/gpu/drm/i915/display/intel_dpll_mgr.c clk_div->m2_int = best_clock.m2 >> 22; m2 1772 drivers/gpu/drm/i915/display/intel_dpll_mgr.c clk_div->m2_frac = best_clock.m2 & ((1 << 22) - 1); m2 1256 drivers/gpu/drm/i915/display/intel_sdvo.c clock->m2 = 8; m2 1262 drivers/gpu/drm/i915/display/intel_sdvo.c clock->m2 = 8; m2 272 drivers/gpu/drm/omapdrm/dss/pll.c unsigned int n, m, mf, m2, sd; m2 283 drivers/gpu/drm/omapdrm/dss/pll.c m2 = DIV_ROUND_UP(min_dco, target_clkout); m2 284 drivers/gpu/drm/omapdrm/dss/pll.c if (m2 == 0) m2 285 drivers/gpu/drm/omapdrm/dss/pll.c m2 = 1; m2 287 drivers/gpu/drm/omapdrm/dss/pll.c target_clkdco = target_clkout * m2; m2 301 drivers/gpu/drm/omapdrm/dss/pll.c clkout = clkdco / m2; m2 307 drivers/gpu/drm/omapdrm/dss/pll.c n, m, mf, m2, sd); m2 313 drivers/gpu/drm/omapdrm/dss/pll.c cinfo->mX[0] = m2; m2 228 drivers/input/touchscreen/mxs-lradc-ts.c unsigned int pressure, m1, m2; m2 239 drivers/input/touchscreen/mxs-lradc-ts.c m2 = mxs_lradc_ts_read_raw_channel(ts, ch2); m2 241 drivers/input/touchscreen/mxs-lradc-ts.c if (m2 == 0) { m2 249 drivers/input/touchscreen/mxs-lradc-ts.c pressure /= m2; m2 214 drivers/media/common/saa7146/saa7146_video.c int i,p,m1,m2,m3,o1,o2; m2 220 drivers/media/common/saa7146/saa7146_video.c m2 = ((size+(size/4)+PAGE_SIZE)/PAGE_SIZE)-1; m2 225 drivers/media/common/saa7146/saa7146_video.c size, m1, m2, m3, o1, o2); m2 231 drivers/media/common/saa7146/saa7146_video.c m2 = ((size+(size/2)+PAGE_SIZE)/PAGE_SIZE)-1; m2 236 drivers/media/common/saa7146/saa7146_video.c size, m1, m2, m3, o1, o2); m2 269 drivers/media/common/saa7146/saa7146_video.c for(i = m1; i <= m2 ; i++, ptr2++) { m2 278 drivers/media/common/saa7146/saa7146_video.c for(i = m2; i <= m3; i++,ptr3++) { m2 1211 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c const double m2 = 128.0 * 2523.0 / 4096.0; m2 1223 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c return pow((c1 + c2 * v) / (1 + c3 * v), m2); m2 238 drivers/media/platform/meson/ao-cec-g12a.c unsigned long n2, m1, m2, f1, f2, p1, p2; m2 244 drivers/media/platform/meson/ao-cec-g12a.c m2 = FIELD_GET(CECB_CLK_CNTL_M1, reg1) + 1; m2 249 drivers/media/platform/meson/ao-cec-g12a.c p1 = DIV_ROUND_CLOSEST(100000000 * m1, f1 * (m1 + m2)); m2 250 drivers/media/platform/meson/ao-cec-g12a.c p2 = DIV_ROUND_CLOSEST(100000000 * m2, f2 * (m1 + m2)); m2 2799 drivers/media/usb/gspca/vc032x.c u8 m2; m2 3027 drivers/media/usb/gspca/vc032x.c reg_w(gspca_dev, 0xa0, ptsensor_info->m2, 0xb300); m2 265 drivers/media/usb/zr364xx/zr364xx.c static message m2[] = { m2 278 drivers/media/usb/zr364xx/zr364xx.c static message *init[4] = { m0, m1, m2, m2 }; m2 857 drivers/media/usb/zr364xx/zr364xx.c m2[1].value = 0xf000 + mode; m2 863 drivers/media/usb/zr364xx/zr364xx.c m2[1].value = 0xf000 + 4; m2 866 drivers/media/usb/zr364xx/zr364xx.c m2[1].value = 0xf000 + 0; m2 869 drivers/media/usb/zr364xx/zr364xx.c m2[1].value = 0xf000 + 1; m2 1456 drivers/media/usb/zr364xx/zr364xx.c m2[1].value = 0xf000 + mode; m2 1462 drivers/media/usb/zr364xx/zr364xx.c m2[1].value = 0xf000 + 4; m2 1465 drivers/media/usb/zr364xx/zr364xx.c m2[1].value = 0xf000 + 0; m2 1468 drivers/media/usb/zr364xx/zr364xx.c m2[1].value = 0xf000 + 1; m2 321 drivers/net/ethernet/apm/xgene-v2/main.c rx_error = GET_BITS(D, le64_to_cpu(raw_desc->m2)); m2 58 drivers/net/ethernet/apm/xgene-v2/ring.h __le64 m2; m2 325 drivers/net/ethernet/apm/xgene/xgene_enet_hw.h __le64 m2; m2 536 drivers/net/ethernet/apm/xgene/xgene_enet_main.c raw_desc->m2 = cpu_to_le64(SET_VAL(LL_BYTES_LSB, ell_bytes)); m2 1188 drivers/net/ethernet/broadcom/bnx2x/bnx2x.h u16 m2; m2 20 drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h IRO[157].m2)) m2 23 drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h IRO[158].m2)) m2 29 drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h (IRO[143].base + ((hcIndex) * IRO[143].m1) + ((sbId) * IRO[143].m2)) m2 32 drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h * IRO[142].m2) + ((sbId) * IRO[142].m3)) m2 39 drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h (IRO[316].base + ((pfId) * IRO[316].m1) + ((iscsiEqId) * IRO[316].m2)) m2 41 drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h (IRO[318].base + ((pfId) * IRO[318].m1) + ((iscsiEqId) * IRO[318].m2)) m2 43 drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h (IRO[317].base + ((pfId) * IRO[317].m1) + ((iscsiEqId) * IRO[317].m2)) m2 45 drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h (IRO[319].base + ((pfId) * IRO[319].m1) + ((iscsiEqId) * IRO[319].m2)) m2 47 drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h (IRO[315].base + ((pfId) * IRO[315].m1) + ((iscsiEqId) * IRO[315].m2)) m2 49 drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h (IRO[321].base + ((pfId) * IRO[321].m1) + ((iscsiEqId) * IRO[321].m2)) m2 51 drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h (IRO[320].base + ((pfId) * IRO[320].m1) + ((iscsiEqId) * IRO[320].m2)) m2 73 drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h (IRO[140].base + ((sbId) * IRO[140].m1) + ((hcIndex) * IRO[140].m2)) m2 79 drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h (IRO[139].base + ((sbId) * IRO[139].m1) + ((hcIndex) * IRO[139].m2)) m2 172 drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h IRO[215].m2)) m2 241 drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h IRO[220].m2)) m2 540 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h #define BLOCK_PRTY_INFO(block, en_mask, m1, m1h, m2, m3) \ m2 544 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h en_mask, {m1, m1h, m2, m3}, #block \ m2 547 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h #define BLOCK_PRTY_INFO_0(block, en_mask, m1, m1h, m2, m3) \ m2 551 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h en_mask, {m1, m1h, m2, m3}, #block"_0" \ m2 554 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h #define BLOCK_PRTY_INFO_1(block, en_mask, m1, m1h, m2, m3) \ m2 558 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h en_mask, {m1, m1h, m2, m3}, #block"_1" \ m2 13504 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c target[i].m2 = tmp & 0xffff; m2 2983 drivers/net/ethernet/qlogic/qed/qed_hsi.h u16 m2; m2 4343 drivers/net/ethernet/qlogic/qed/qed_hsi.h (IRO[20].base + ((vf_id) * IRO[20].m1) + ((vf_queue_id) * IRO[20].m2)) m2 4425 drivers/net/ethernet/qlogic/qed/qed_hsi.h (IRO[36].base + ((func_id) * IRO[36].m1) + ((bdq_id) * IRO[36].m2)) m2 4430 drivers/net/ethernet/qlogic/qed/qed_hsi.h (IRO[37].base + ((func_id) * IRO[37].m1) + ((bdq_id) * IRO[37].m2)) m2 162 drivers/net/wireless/ath/ath5k/ani.c static const int m2[] = { 127, 0x40 }; m2 173 drivers/net/wireless/ath/ath5k/ani.c AR5K_PHY_WEAK_OFDM_HIGH_THR_M2, m2[on]); m2 2336 drivers/net/wireless/broadcom/b43/phy_g.c s32 m1, m2, f = 256, q, delta; m2 2340 drivers/net/wireless/broadcom/b43/phy_g.c m2 = max(b43_tssi2dbm_ad(32768 + index * pab2, 256), 1); m2 2345 drivers/net/wireless/broadcom/b43/phy_g.c b43_tssi2dbm_ad(m2 * f, 16) * f, 2048); m2 1945 drivers/net/wireless/broadcom/b43legacy/phy.c s32 m2; m2 1952 drivers/net/wireless/broadcom/b43legacy/phy.c m2 = max(b43legacy_tssi2dbm_ad(32768 + index * pab2, 256), 1); m2 1957 drivers/net/wireless/broadcom/b43legacy/phy.c b43legacy_tssi2dbm_ad(m2 * f, 16) * m2 673 drivers/net/wireless/intel/iwlegacy/4965.c const struct il_eeprom_calib_measure *m2; m2 695 drivers/net/wireless/intel/iwlegacy/4965.c m2 = &(il->calib_info->band_info[s].ch2. m2 702 drivers/net/wireless/intel/iwlegacy/4965.c m2->actual_pow); m2 706 drivers/net/wireless/intel/iwlegacy/4965.c m2->gain_idx); m2 711 drivers/net/wireless/intel/iwlegacy/4965.c m2->temperature); m2 715 drivers/net/wireless/intel/iwlegacy/4965.c m2->pa_det); m2 718 drivers/net/wireless/intel/iwlegacy/4965.c m, m1->actual_pow, m2->actual_pow, m2 721 drivers/net/wireless/intel/iwlegacy/4965.c m, m1->gain_idx, m2->gain_idx, m2 724 drivers/net/wireless/intel/iwlegacy/4965.c m, m1->pa_det, m2->pa_det, omeas->pa_det); m2 726 drivers/net/wireless/intel/iwlegacy/4965.c m, m1->temperature, m2->temperature, m2 389 drivers/scsi/mvumi.h int size, m1, m2; \ m2 391 drivers/scsi/mvumi.h m2 = max(HSP_SIZE(2), HSP_SIZE(4)); \ m2 392 drivers/scsi/mvumi.h size = max(m1, m2); \ m2 844 drivers/ssb/main.c u32 n1, n2, clock, m1, m2, m3, mc; m2 885 drivers/ssb/main.c m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT); m2 897 drivers/ssb/main.c m2 += SSB_CHIPCO_CLK_F5_BIAS; m2 899 drivers/ssb/main.c m2 = clkfactor_f6_resolve(m2); m2 908 drivers/ssb/main.c return (clock / (m1 * m2)); m2 910 drivers/ssb/main.c return (clock / (m1 * m2 * m3)); m2 917 drivers/ssb/main.c m2 += SSB_CHIPCO_CLK_T2M2_BIAS; m2 920 drivers/ssb/main.c WARN_ON(!((m2 >= 3) && (m2 <= 10))); m2 926 drivers/ssb/main.c clock /= m2; m2 666 drivers/video/fbdev/intelfb/intelfbhw.c static int calc_vclock(int index, int m1, int m2, int n, int p1, int p2, m2 672 drivers/video/fbdev/intelfb/intelfbhw.c m = (5 * (m1 + 2)) + (m2 + 2); m2 716 drivers/video/fbdev/intelfb/intelfbhw.c int i, m1, m2, n, p1, p2; m2 729 drivers/video/fbdev/intelfb/intelfbhw.c m2 = (hw->vga0_divisor >> FP_M2_DIVISOR_SHIFT) & FP_DIVISOR_MASK; m2 734 drivers/video/fbdev/intelfb/intelfbhw.c m1, m2, n, p1, p2); m2 736 drivers/video/fbdev/intelfb/intelfbhw.c calc_vclock(index, m1, m2, n, p1, p2, 0)); m2 740 drivers/video/fbdev/intelfb/intelfbhw.c m2 = (hw->vga1_divisor >> FP_M2_DIVISOR_SHIFT) & FP_DIVISOR_MASK; m2 744 drivers/video/fbdev/intelfb/intelfbhw.c m1, m2, n, p1, p2); m2 746 drivers/video/fbdev/intelfb/intelfbhw.c calc_vclock(index, m1, m2, n, p1, p2, 0)); m2 757 drivers/video/fbdev/intelfb/intelfbhw.c m2 = (hw->fpa0 >> FP_M2_DIVISOR_SHIFT) & FP_DIVISOR_MASK; m2 762 drivers/video/fbdev/intelfb/intelfbhw.c m1, m2, n, p1, p2); m2 764 drivers/video/fbdev/intelfb/intelfbhw.c calc_vclock(index, m1, m2, n, p1, p2, 0)); m2 768 drivers/video/fbdev/intelfb/intelfbhw.c m2 = (hw->fpa1 >> FP_M2_DIVISOR_SHIFT) & FP_DIVISOR_MASK; m2 773 drivers/video/fbdev/intelfb/intelfbhw.c m1, m2, n, p1, p2); m2 775 drivers/video/fbdev/intelfb/intelfbhw.c calc_vclock(index, m1, m2, n, p1, p2, 0)); m2 883 drivers/video/fbdev/intelfb/intelfbhw.c int m1, m2; m2 889 drivers/video/fbdev/intelfb/intelfbhw.c for (m2 = pll->min_m2; m2 < pll->max_m2 + 1; m2++) { m2 890 drivers/video/fbdev/intelfb/intelfbhw.c testm = (5 * (m1 + 2)) + (m2 + 2); m2 893 drivers/video/fbdev/intelfb/intelfbhw.c *retm2 = (unsigned int)m2; m2 940 drivers/video/fbdev/intelfb/intelfbhw.c u32 m1, m2, n, p1, p2, n1, testm; m2 979 drivers/video/fbdev/intelfb/intelfbhw.c if (splitm(index, testm, &m1, &m2)) { m2 1008 drivers/video/fbdev/intelfb/intelfbhw.c splitm(index, m, &m1, &m2); m2 1014 drivers/video/fbdev/intelfb/intelfbhw.c m, m1, m2, n, n1, p, p1, p2, m2 1016 drivers/video/fbdev/intelfb/intelfbhw.c calc_vclock(index, m1, m2, n1, p1, p2, 0), m2 1019 drivers/video/fbdev/intelfb/intelfbhw.c *retm2 = m2; m2 1023 drivers/video/fbdev/intelfb/intelfbhw.c *retclock = calc_vclock(index, m1, m2, n1, p1, p2, 0); m2 1046 drivers/video/fbdev/intelfb/intelfbhw.c u32 m1, m2, n, p1, p2, clock_target, clock; m2 1115 drivers/video/fbdev/intelfb/intelfbhw.c if (calc_pll_params(dinfo->pll_index, clock_target, &m1, &m2, m2 1128 drivers/video/fbdev/intelfb/intelfbhw.c if (check_overflow(m2, FP_DIVISOR_MASK, "PLL M2 parameter")) m2 1145 drivers/video/fbdev/intelfb/intelfbhw.c (m2 << FP_M2_DIVISOR_SHIFT); m2 588 drivers/video/fbdev/matrox/matroxfb_base.c unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */ m2 592 drivers/video/fbdev/matrox/matroxfb_base.c while (m2 >= m1) m2 -= m1; m2 593 drivers/video/fbdev/matrox/matroxfb_base.c swap(m1, m2); m2 595 drivers/video/fbdev/matrox/matroxfb_base.c m2 = linelen * PAGE_SIZE / m2; m2 596 drivers/video/fbdev/matrox/matroxfb_base.c *ydstorg = m2 = 0x400000 % m2; m2 597 drivers/video/fbdev/matrox/matroxfb_base.c max_yres = (vramlen - m2) / linelen; m2 45 drivers/video/fbdev/omap2/omapfb/dss/hdmi_pll.c unsigned n, m, mf, m2, sd; m2 61 drivers/video/fbdev/omap2/omapfb/dss/hdmi_pll.c m2 = DIV_ROUND_UP(min_dco, target_bitclk); m2 62 drivers/video/fbdev/omap2/omapfb/dss/hdmi_pll.c if (m2 == 0) m2 63 drivers/video/fbdev/omap2/omapfb/dss/hdmi_pll.c m2 = 1; m2 65 drivers/video/fbdev/omap2/omapfb/dss/hdmi_pll.c target_clkdco = target_bitclk * m2; m2 79 drivers/video/fbdev/omap2/omapfb/dss/hdmi_pll.c clkout = clkdco / m2; m2 85 drivers/video/fbdev/omap2/omapfb/dss/hdmi_pll.c n, m, mf, m2, sd); m2 91 drivers/video/fbdev/omap2/omapfb/dss/hdmi_pll.c pi->mX[0] = m2; m2 293 drivers/video/fbdev/sstfb.c int m, m2, n, p, best_err, fout; m2 306 drivers/video/fbdev/sstfb.c m2 = (2 * freq * (1 << p) * (n + 2) ) / DAC_FREF - 4 ; m2 308 drivers/video/fbdev/sstfb.c m = (m2 % 2 ) ? m2/2+1 : m2/2 ; m2 2950 fs/dcache.c struct rw_semaphore *m2 = NULL; m2 2963 fs/dcache.c m2 = &alias->d_parent->d_inode->i_rwsem; m2 2968 fs/dcache.c if (m2) m2 2969 fs/dcache.c up_read(m2); m2 157 fs/nfs/flexfilelayout/flexfilelayout.c const struct nfs4_ff_layout_mirror *m2) m2 161 fs/nfs/flexfilelayout/flexfilelayout.c if (m1->fh_versions_cnt != m2->fh_versions_cnt) m2 165 fs/nfs/flexfilelayout/flexfilelayout.c for (j = 0; j < m2->fh_versions_cnt; j++) { m2 167 fs/nfs/flexfilelayout/flexfilelayout.c &m2->fh_versions[j]) == 0) { m2 220 fs/pnode.c static inline bool peers(struct mount *m1, struct mount *m2) m2 222 fs/pnode.c return m1->mnt_group_id == m2->mnt_group_id && m1->mnt_group_id; m2 24 fs/ubifs/master.c int ubifs_compare_master_node(struct ubifs_info *c, void *m1, void *m2) m2 34 fs/ubifs/master.c ret = memcmp(m1 + UBIFS_CH_SZ, m2 + UBIFS_CH_SZ, m2 46 fs/ubifs/master.c return memcmp(m1 + behind, m2 + behind, UBIFS_MST_NODE_SZ - behind); m2 1895 fs/ubifs/ubifs.h int ubifs_compare_master_node(struct ubifs_info *c, void *m1, void *m2); m2 149 include/net/netfilter/nf_conntrack_tuple.h const struct nf_conntrack_tuple_mask *m2) m2 151 include/net/netfilter/nf_conntrack_tuple.h return (nf_inet_addr_cmp(&m1->src.u3, &m2->src.u3) && m2 152 include/net/netfilter/nf_conntrack_tuple.h m1->src.u.all == m2->src.u.all); m2 56 include/uapi/linux/mroute.h #define VIFM_SAME(m1,m2) ((m1)==(m2)) m2 440 include/uapi/linux/pkt_sched.h __u32 m2; /* slope of the second segment in bps */ m2 78 kernel/kcmp.c static void kcmp_unlock(struct mutex *m1, struct mutex *m2) m2 80 kernel/kcmp.c if (likely(m2 != m1)) m2 81 kernel/kcmp.c mutex_unlock(m2); m2 85 kernel/kcmp.c static int kcmp_lock(struct mutex *m1, struct mutex *m2) m2 89 kernel/kcmp.c if (m2 > m1) m2 90 kernel/kcmp.c swap(m1, m2); m2 93 kernel/kcmp.c if (!err && likely(m1 != m2)) { m2 94 kernel/kcmp.c err = mutex_lock_killable_nested(m2, SINGLE_DEPTH_NESTING); m2 236 net/ipv4/raw_diag.c #define __offset_mismatch(m1, m2) \ m2 238 net/ipv4/raw_diag.c offsetof(struct inet_diag_req_raw, m2)) m2 1210 net/netfilter/ipvs/ip_vs_sync.c struct ip_vs_sync_mesg *m2 = (struct ip_vs_sync_mesg *)buffer; m2 1219 net/netfilter/ipvs/ip_vs_sync.c if (buflen != ntohs(m2->size)) { m2 1224 net/netfilter/ipvs/ip_vs_sync.c if (ipvs->bcfg.syncid != 0 && m2->syncid != ipvs->bcfg.syncid) { m2 1225 net/netfilter/ipvs/ip_vs_sync.c IP_VS_DBG(7, "BACKUP, Ignoring syncid = %d\n", m2->syncid); m2 1229 net/netfilter/ipvs/ip_vs_sync.c if ((m2->version == SYNC_PROTO_VER) && (m2->reserved == 0) m2 1230 net/netfilter/ipvs/ip_vs_sync.c && (m2->spare == 0)) { m2 1233 net/netfilter/ipvs/ip_vs_sync.c nr_conns = m2->nr_conns; m2 480 net/sched/sch_hfsc.c isc->sm2 = m2sm(sc->m2); m2 481 net/sched/sch_hfsc.c isc->ism2 = m2ism(sc->m2); m2 936 net/sched/sch_hfsc.c if (rsc->m1 == 0 && rsc->m2 == 0) m2 942 net/sched/sch_hfsc.c if (fsc->m1 == 0 && fsc->m2 == 0) m2 948 net/sched/sch_hfsc.c if (usc->m1 == 0 && usc->m2 == 0) m2 1260 net/sched/sch_hfsc.c tsc.m2 = sm2m(sc->sm2); m2 144 scripts/dtc/data.c struct marker *m2 = d2.markers; m2 146 scripts/dtc/data.c d = data_append_markers(data_append_data(d1, d2.val, d2.len), m2); m2 149 scripts/dtc/data.c for_each_marker(m2) m2 150 scripts/dtc/data.c m2->offset += d1.len; m2 1853 sound/soc/codecs/max98090.c int m2; m2 1863 sound/soc/codecs/max98090.c m2 = dmic_table[i].pclk - pclk; m2 1864 sound/soc/codecs/max98090.c if (m1 < m2) m2 439 tools/include/uapi/linux/pkt_sched.h __u32 m2; /* slope of the second segment in bps */ m2 1779 tools/lib/bpf/btf.c const struct btf_enum *m1, *m2; m2 1788 tools/lib/bpf/btf.c m2 = btf_enum(t2); m2 1790 tools/lib/bpf/btf.c if (m1->name_off != m2->name_off || m1->val != m2->val) m2 1793 tools/lib/bpf/btf.c m2++; m2 1841 tools/lib/bpf/btf.c const struct btf_member *m1, *m2; m2 1850 tools/lib/bpf/btf.c m2 = btf_members(t2); m2 1852 tools/lib/bpf/btf.c if (m1->name_off != m2->name_off || m1->offset != m2->offset) m2 1855 tools/lib/bpf/btf.c m2++; m2 1939 tools/lib/bpf/btf.c const struct btf_param *m1, *m2; m2 1948 tools/lib/bpf/btf.c m2 = btf_params(t2); m2 1950 tools/lib/bpf/btf.c if (m1->name_off != m2->name_off || m1->type != m2->type) m2 1953 tools/lib/bpf/btf.c m2++; m2 1965 tools/lib/bpf/btf.c const struct btf_param *m1, *m2; m2 1975 tools/lib/bpf/btf.c m2 = btf_params(t2); m2 1977 tools/lib/bpf/btf.c if (m1->name_off != m2->name_off) m2 1980 tools/lib/bpf/btf.c m2++; m2 308 tools/testing/selftests/powerpc/benchmarks/context_switch.c static unsigned long *m1, *m2; m2 315 tools/testing/selftests/powerpc/benchmarks/context_switch.c m2 = &_m2; m2 336 tools/testing/selftests/powerpc/benchmarks/context_switch.c m2 = shmaddr + sizeof(*m1); m2 340 tools/testing/selftests/powerpc/benchmarks/context_switch.c *m2 = 0; m2 343 tools/testing/selftests/powerpc/benchmarks/context_switch.c mutex_lock(m2); m2 352 tools/testing/selftests/powerpc/benchmarks/context_switch.c mutex_lock(m2); m2 364 tools/testing/selftests/powerpc/benchmarks/context_switch.c mutex_unlock(m2);