MClk 202 drivers/gpu/drm/nouveau/dispnv04/arb.c int MClk = nouveau_hw_get_clock(dev, PLL_MEMORY); MClk 207 drivers/gpu/drm/nouveau/dispnv04/arb.c sim_data.mclk_khz = MClk; MClk 141 drivers/video/fbdev/nvidia/nv_hw.c static void nvGetClocks(struct nvidia_par *par, unsigned int *MClk, MClk 160 drivers/video/fbdev/nvidia/nv_hw.c *MClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P; MClk 184 drivers/video/fbdev/nvidia/nv_hw.c *MClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P; MClk 213 drivers/video/fbdev/nvidia/nv_hw.c *MClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P; MClk 232 drivers/video/fbdev/nvidia/nv_hw.c *MClk = (N * par->CrystalFreqKHz / M) >> P; MClk 387 drivers/video/fbdev/nvidia/nv_hw.c unsigned int MClk, NVClk, cfg1; MClk 389 drivers/video/fbdev/nvidia/nv_hw.c nvGetClocks(par, &MClk, &NVClk); MClk 403 drivers/video/fbdev/nvidia/nv_hw.c sim_data.mclk_khz = MClk; MClk 626 drivers/video/fbdev/nvidia/nv_hw.c unsigned int MClk, NVClk, cfg1; MClk 628 drivers/video/fbdev/nvidia/nv_hw.c nvGetClocks(par, &MClk, &NVClk); MClk 643 drivers/video/fbdev/nvidia/nv_hw.c sim_data.mclk_khz = MClk; MClk 661 drivers/video/fbdev/nvidia/nv_hw.c unsigned int MClk, NVClk; MClk 668 drivers/video/fbdev/nvidia/nv_hw.c nvGetClocks(par, &MClk, &NVClk); MClk 684 drivers/video/fbdev/nvidia/nv_hw.c unsigned int M, N, P, pll, MClk, NVClk, memctrl; MClk 696 drivers/video/fbdev/nvidia/nv_hw.c MClk = 400000 / uMClkPostDiv; MClk 699 drivers/video/fbdev/nvidia/nv_hw.c pci_read_config_dword(dev, 0x4c, &MClk); MClk 700 drivers/video/fbdev/nvidia/nv_hw.c MClk /= 1000; MClk 745 drivers/video/fbdev/nvidia/nv_hw.c sim_data.mclk_khz = MClk; MClk 619 drivers/video/fbdev/riva/riva_hw.c unsigned int M, N, P, pll, MClk; MClk 623 drivers/video/fbdev/riva/riva_hw.c MClk = (N * chip->CrystalFreqKHz / M) >> P; MClk 637 drivers/video/fbdev/riva/riva_hw.c sim_data.mclk_khz = MClk; MClk 808 drivers/video/fbdev/riva/riva_hw.c unsigned int M, N, P, pll, MClk, NVClk, cfg1; MClk 812 drivers/video/fbdev/riva/riva_hw.c MClk = (N * chip->CrystalFreqKHz / M) >> P; MClk 827 drivers/video/fbdev/riva/riva_hw.c sim_data.mclk_khz = MClk; MClk 1071 drivers/video/fbdev/riva/riva_hw.c unsigned int M, N, P, pll, MClk, NVClk, cfg1; MClk 1075 drivers/video/fbdev/riva/riva_hw.c MClk = (N * chip->CrystalFreqKHz / M) >> P; MClk 1092 drivers/video/fbdev/riva/riva_hw.c sim_data.mclk_khz = MClk; MClk 1117 drivers/video/fbdev/riva/riva_hw.c unsigned int M, N, P, pll, MClk, NVClk; MClk 1128 drivers/video/fbdev/riva/riva_hw.c MClk = 400000 / uMClkPostDiv; MClk 1148 drivers/video/fbdev/riva/riva_hw.c sim_data.mclk_khz = MClk;