lvdcr0 410 drivers/gpu/drm/rcar-du/rcar_lvds.c u32 lvdcr0; lvdcr0 459 drivers/gpu/drm/rcar-du/rcar_lvds.c lvdcr0 = lvds->mode << LVDCR0_LVMD_SHIFT; lvdcr0 467 drivers/gpu/drm/rcar-du/rcar_lvds.c lvdcr0 |= LVDCR0_DUSEL; lvdcr0 470 drivers/gpu/drm/rcar-du/rcar_lvds.c rcar_lvds_write(lvds, LVDCR0, lvdcr0); lvdcr0 479 drivers/gpu/drm/rcar-du/rcar_lvds.c lvdcr0 |= LVDCR0_BEN | LVDCR0_LVEN; lvdcr0 480 drivers/gpu/drm/rcar-du/rcar_lvds.c rcar_lvds_write(lvds, LVDCR0, lvdcr0); lvdcr0 488 drivers/gpu/drm/rcar-du/rcar_lvds.c lvdcr0 |= LVDCR0_PLLON; lvdcr0 489 drivers/gpu/drm/rcar-du/rcar_lvds.c rcar_lvds_write(lvds, LVDCR0, lvdcr0); lvdcr0 494 drivers/gpu/drm/rcar-du/rcar_lvds.c lvdcr0 |= LVDCR0_PWD; lvdcr0 495 drivers/gpu/drm/rcar-du/rcar_lvds.c rcar_lvds_write(lvds, LVDCR0, lvdcr0); lvdcr0 503 drivers/gpu/drm/rcar-du/rcar_lvds.c lvdcr0 |= LVDCR0_LVEN; lvdcr0 505 drivers/gpu/drm/rcar-du/rcar_lvds.c rcar_lvds_write(lvds, LVDCR0, lvdcr0); lvdcr0 514 drivers/gpu/drm/rcar-du/rcar_lvds.c lvdcr0 |= LVDCR0_LVRES; lvdcr0 515 drivers/gpu/drm/rcar-du/rcar_lvds.c rcar_lvds_write(lvds, LVDCR0, lvdcr0);