lut_uv            303 drivers/clk/tegra/clk-dfll.c 	unsigned long			lut_uv[MAX_DFLL_VOLTAGES];
lut_uv            509 drivers/clk/tegra/clk-dfll.c 	min_uv = td->lut_uv[out_min];
lut_uv            766 drivers/clk/tegra/clk-dfll.c 		unsigned long vmin = td->lut_uv[0];
lut_uv            808 drivers/clk/tegra/clk-dfll.c 		if ((td->lut_uv[i] / td->soc->alignment.step_uv) >= align_step)
lut_uv           1593 drivers/clk/tegra/clk-dfll.c 		reg_volt = td->lut_uv[i];
lut_uv           1696 drivers/clk/tegra/clk-dfll.c 			td->lut_uv[j] =
lut_uv           1797 drivers/clk/tegra/clk-dfll.c 		td->lut_uv[i] = td->soc->alignment.offset_uv +